Renesas X9313ZSZ-3
- Part No.:
- X9313ZSZ-3
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
X9313ZSZ-3.pdf
- Description:
- IC DGTL POT 1KOHM 32TAP 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,196
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
X9313ZSZ-3 from Intersil is a digitally controlled potentiometer (XDCP™) implementing a 32-tap linear resistor array with nonvolatile wiper position storage, 3-wire serial interface (CS/U/D/INC), ±VCC terminal voltage range, and 1kΩ end-to-end resistance - used for precision analog trimming in voltage divider and variable resistor configurations.
For engineers reviewing the X9313ZSZ-3 datasheet, X9313ZSZ-3 pinout, X9313ZSZ-3 application, or X9313ZSZ-3 equivalent, key selection considerations include its 3V–5.5V supply compatibility, -40°C to +85°C industrial temperature grade, SOIC-8 package, 100,000-cycle endurance, and 100-year data retention - critical for maintenance-free calibration in embedded control systems.
Technical Context
The X9313ZSZ-3 integrates a 31-element resistor ladder, 5-bit up/down counter, nonvolatile memory, and make-before-break wiper switching. Its wiper position is set via edge-triggered INC input under CS enable, with direction controlled by U/D logic level.
Wiper position is stored on CS↑ while INC = HIGH, enabling power-up recall of last setting. Terminal voltages support ±VCC operation (±3V to ±5.5V), and wiper resistance is 40Ω typical at VCC = 5V - enabling direct connection to op-amp inputs or feedback nodes without buffering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| End-to-end resistance (RTOTAL) | 1kΩ ±20% - defines full-scale adjustment range and current-handling capability in voltage divider or rheostat mode. |
| Supply voltage range | 3V to 5.5V - supports dual-rail operation across legacy 3.3V and 5V systems without level-shifting. |
| Wiper tap count | 32 positions (0–31) - provides 3.125% resolution per step for fine-grained analog tuning. |
| Nonvolatile storage endurance | 100,000 write cycles - enables field calibration updates over product lifetime without wear-out concerns. |
| Power-up behavior | Recalls last stored wiper position - ensures deterministic startup state without host MCU initialization sequence. |
| Terminal voltage range | −VCC to +VCC - allows bidirectional signal handling (e.g., ±2.5V rails) without external clamping diodes. |
| Standby current | 500µA max - minimizes quiescent power in battery-backed or low-power sleep modes. |
Pinout & Package
Package: 8-lead SOIC (Pb-free, RoHS compliant), JEDEC MS-012-AA compliant, body size 4.9mm × 3.9mm × 1.75mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Positive supply rail | Accepts 3V–5.5V; powers internal logic, memory, and resistor array; must be stable before CS activation. |
| VSS | Ground reference | Common return for all digital and analog functions; requires low-impedance connection to minimize noise coupling. |
| CS | Chip select input | Active-low enable; stores wiper position on rising edge when INC = HIGH; places device in standby when high and INC low. |
| U/D | Direction control | Logic level sets wiper movement direction (HIGH = increment, LOW = decrement) during subsequent INC transitions. |
| INC | Increment clock input | Negative-edge triggered; advances wiper one tap per valid edge; timing requires tIL ≥ 1µs and tIH ≥ 1µs. |
| RH/VH | High terminal | Fixed end of resistor array; voltage rating −VCC to +VCC; connects to upper rail in voltage divider applications. |
| RL/VL | Low terminal | Fixed end of resistor array; voltage rating −VCC to +VCC; connects to lower rail or ground in voltage divider applications. |
| RW/VW | Wiper terminal | Movable tap output; series resistance 40Ω typical at 5V; directly interfaces with op-amp inputs or feedback networks. |
Key Features
| Feature | Design Value |
|---|---|
| Solid-state potentiometer architecture | Eliminates mechanical wear, vibration sensitivity, and contact noise - ideal for sealed or high-reliability enclosures. |
| 3-wire serial interface | Requires only CS, U/D, and INC signals - reduces MCU GPIO usage and eliminates need for SPI/I²C peripherals or address decoding. |
| Nonvolatile wiper position storage | Retains setting for 100 years; enables factory calibration, user presets, or adaptive compensation without backup power or EEPROM writes. |
| Temperature-compensated resistor array | ±300 ppm/°C RTOTAL drift - maintains trim accuracy across industrial temperature range without software correction. |
| Make-before-break wiper switching | Prevents open-circuit transients during tap transitions - avoids glitches in feedback loops or bias networks. |
| ±VCC terminal voltage tolerance | Supports bipolar signal paths (e.g., ±2.5V) without external level shifters - simplifies design in audio, sensor, and instrumentation circuits. |
Applications
| Audio Signal Level Control | DC Bias Voltage Adjustment |
|---|---|
|
Use Scenario: Setting gain or volume in line-level audio amplifiers using op-amp feedback networks. IC Role / Device Role / Timing Role: Two-terminal variable resistor in noninverting amplifier feedback path; wiper position sets closed-loop gain. Use Value: Enables silent, glitch-free gain changes via digital command; ±VCC tolerance supports AC-coupled ±5V signal paths without DC blocking. |
Use Scenario: Calibrating offset voltage in precision instrumentation amplifiers or sensor front-ends. IC Role / Device Role / Timing Role: Three-terminal potentiometer configured as adjustable voltage divider feeding op-amp summing junction. Use Value: Maintains calibrated offset after power cycle; 1kΩ value minimizes loading on reference sources while supporting <1mV adjustment resolution. |
| Programmable Voltage Reference | Motor Current Limit Trim |
|
Use Scenario: Generating stable, user-adjustable reference voltages for ADCs or comparators in industrial controllers. IC Role / Device Role / Timing Role: Three-terminal potentiometer with RH tied to +VREF, RL to GND, and RW driving buffer op-amp. Use Value: Delivers 0–VREF output with 3.125% step resolution; nonvolatile storage preserves factory-set reference across firmware updates. |
Use Scenario: Setting current-sense threshold in H-bridge motor drivers to adjust torque or stall protection limits. IC Role / Device Role / Timing Role: Two-terminal variable resistor in current-sense amplifier gain network or comparator reference leg. Use Value: Allows field recalibration of current limit without hardware change; 100,000-cycle endurance supports repeated commissioning in service environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5243BRMZ10 | I²C interface, dual-channel, 256-tap resolution, 10kΩ RTOTAL, 2.7–5.5V supply | Requires I²C bus and address configuration; higher resolution but larger step size due to 10kΩ value | Preferred when dual independent pots or finer resolution needed; not drop-in due to different interface and pinout |
| MCP41010-I/P | SPI interface, single-channel, 256-tap, 10kΩ RTOTAL, 2.7–5.5V supply, volatile wiper register | No nonvolatile storage - wiper resets to mid-scale on power-up; requires host MCU to reload setting | Selected for cost-sensitive designs where calibration is performed at boot; unsuitable for unattended or battery-powered retainment use cases |
Compared with AD5243BRMZ10 and MCP41010-I/P, the X9313ZSZ-3 offers unique advantages in 3-wire simplicity, guaranteed power-up recall, and ±VCC analog voltage tolerance - making it optimal for robust, low-pin-count analog trimming where deterministic startup and bipolar signal handling are required.
Availability
X9313ZSZ-3 is available at Aetrix Electronics and suitable for industrial motor control, precision instrumentation, audio equipment, and embedded sensor calibration requiring stable component supply and long-term calibration retention.
Supply support for X9313ZSZ-3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a precision analog and power management semiconductor provider, now part of Renesas Electronics, with deep expertise in high-reliability industrial and infrastructure solutions.
The X9313 family was designed specifically for solid-state replacement of mechanical potentiometers in calibration-critical analog signal paths - emphasizing nonvolatile retention, temperature stability, and interface simplicity.
FAQ
What is the maximum allowable voltage across RH and RL terminals for X9313ZSZ-3?
The X9313ZSZ-3 specifies ΔV = |VH − VL| ≤ 4V for the Z-grade variant. This limit ensures safe operation of the internal resistor array and wiper switches. Exceeding 4V may cause irreversible damage or accelerated wear, even if individual terminal voltages remain within −VCC to +VCC bounds. Always verify voltage differential in your circuit layout before finalizing.
Does X9313ZSZ-3 require an external pull-up or pull-down resistor on the INC pin?
No, the X9313ZSZ-3 does not require external biasing on the INC pin. Its input leakage current is ±10µA over temperature, and VIH/VIL thresholds are defined relative to VCC and VSS. A clean, actively driven digital signal meeting tIL ≥ 1µs and tIH ≥ 1µs timing is sufficient. Adding pull resistors may distort edge timing and violate AC specifications.
Can X9313ZSZ-3 be used in a bipolar ±5V system where VH = +5V and VL = −5V?
Yes, X9313ZSZ-3 supports terminal voltages from −VCC to +VCC. With VCC = 5V, VH and VL may each swing from −5V to +5V, enabling direct use in ±5V op-amp circuits. However, the absolute voltage difference |VH − VL| must not exceed 4V - so this configuration is only valid if VH and VL differ by ≤4V (e.g., VH = +2V, VL = −2V).
How is wiper position stored in nonvolatile memory on X9313ZSZ-3?
Wiper position is stored when CS transitions HIGH while INC is held HIGH. This store command initiates a 10ms internal programming cycle (tWR). During this time, the device draws elevated current and must not be deselected or reset. Once complete, the value persists for 100 years and automatically loads on next power-up - no external commands or power-supply sequencing required.
What is the wiper resistance specification for X9313ZSZ-3 and how does it affect circuit performance?
X9313ZSZ-3 specifies wiper resistance RW as 40Ω typical at VCC = 5V (max 100Ω). This low on-resistance minimizes gain error and thermal noise in precision voltage dividers and feedback networks. When used with 1kΩ RTOTAL, RW contributes <10% of total resistance uncertainty - critical for maintaining linearity and minimizing loading effects on high-impedance nodes like op-amp inputs.
X9313ZSZ-3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 1
- Number of Taps:
- 32
- Resistance (Ohms):
- 1k
- Interface:
- Up/Down (U/D, INC, CS)
- Memory Type:
- Non-Volatile
- Voltage - Supply:
- 3V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- ±300ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-SOIC
- Operating Temperature:
- 0°C ~ 70°C
- Resistance - Wiper (Ohms) (Typ):
- 40
X9313ZSZ-3 FAQ
1.How can I place an order for X9313ZSZ-3 through Aetrix?
Please submit a Request for Quotation (RFQ) for X9313ZSZ-3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for X9313ZSZ-3 reliable?
The price and inventory of X9313ZSZ-3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for X9313ZSZ-3 is usually 5 days.
3.What payment methods are accepted for X9313ZSZ-3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for X9313ZSZ-3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for X9313ZSZ-3?
X9313ZSZ-3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your X9313ZSZ-3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for X9313ZSZ-3?
For technical support, including X9313ZSZ-3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your X9313ZSZ-3 requirements.
6.How does Aetrix verify that X9313ZSZ-3 is sourced from the original manufacturer or authorized distributors?
All X9313ZSZ-3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that X9313ZSZ-3 meets industry standards.
7.What is the process for return or replacement of X9313ZSZ-3?
All X9313ZSZ-3 units undergo pre-shipment inspection (PSI). If there is an issue with X9313ZSZ-3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The X9313ZSZ-3 part is unused and in its original packaging.
Return procedure for X9313ZSZ-3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
X9313ZSZ-3 Tags

-
MCP4018T-103E/LT
Microchip Technology

-
MCP4018T-503E/LT
Microchip Technology

-
MCP4011T-103E/SN
Microchip Technology

-
MCP4018T-104E/LT
Microchip Technology

-
MCP4017T-503E/LT
Microchip Technology

-
MCP4018T-502E/LT
Microchip Technology

-
MCP4017T-103E/LT
Microchip Technology

-
MCP4531T-103E/MF
Microchip Technology

-
MCP4021T-202E/SN
Microchip Technology

-
MCP4023T-103E/CH
Microchip Technology

-
MCP4022T-503E/CH
Microchip Technology

-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

