Texas Instruments XAM3517ZCN
- Part No.:
- XAM3517ZCN
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 491-LFBGA
- Datasheet:
-
XAM3517ZCN.pdf
- Description:
- IC MPU SITARA 600MHZ 491NFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,288
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
XAM3517ZCN from Texas Instruments is a 600-MHz ARM Cortex-A8 microprocessor with PowerVR SGX graphics acceleration, 256KB L2 cache, DDR2/mDDR memory controller, and integrated display subsystem supporting NTSC/PAL video output - deployed in industrial HMIs, digital signage, and portable media players.
For engineers reviewing the XAM3517ZCN datasheet, XAM3517ZCN pinout, XAM3517ZCN application, or XAM3517ZCN equivalent, key selection criteria include its 491-pin NFBGA (ZCN) package, TV-out capability (distinguishing it from ZER variants), 1.2V core voltage, 166-MHz DDR2 interface, and Linux/Android OS support.
Technical Context
The XAM3517ZCN integrates an in-order, dual-issue, superscalar ARM Cortex-A8 core with NEON SIMD and VFP coprocessors, Jazelle RCT execution environment, and embedded trace macrocell (ETM) for noninvasive debug. Its memory architecture includes 16KB instruction and 16KB data L1 caches plus 256KB unified L2 cache with ECC support.
System-level interconnect uses hierarchical L3/L4 networks enabling concurrent high-bandwidth access to DDR2/mDDR via SDRC, GPMC for NAND/NOR/SRAM, and multiple peripheral domains including VPFE video input, DSS display processor with RGB/S-Video/CVBS outputs, and HECC CAN controller.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | ARM Cortex-A8, ARMv7, in-order dual-issue superscalar with NEON SIMD and VFP |
| Clock Speed | 600 MHz - enables real-time multimedia processing and Linux kernel scheduling at industrial-grade throughput |
| Graphics Acceleration | PowerVR SGX (AM3517 only) - delivers up to 10 MPoly/sec for UI rendering and gaming effects |
| Memory Interface | 166-MHz 16-/32-bit DDR2/mDDR with 1GB address space - supports low-latency frame buffer and system memory |
| Display Outputs | Parallel RGB (up to 24-bit), CVBS NTSC/PAL, S-Video - enables direct connection to legacy and embedded displays |
| Video Input | 16-bit VPFE port with 75-MHz pixel clock - captures HD video per REC656/CCIR656 standard |
| I/O Voltage | mDDR/DDR2 IOs: 1.8V; other IOs: 1.8V or 3.3V - requires dual-rail power design with level-shifting for mixed-voltage peripherals |
Pinout & Package
Package: 491-pin NFBGA (17.10 mm × 17.10 mm, 0.65-mm pitch), Via Channel™ array technology. Thermal pad on underside; requires exposed thermal pad soldering per TI PCB layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_CORE | Core power supply | 1.2V supply for ARM Cortex-A8 core and L1/L2 caches - must be tightly regulated with ≤±3% tolerance |
| SDRC_D0–SDRC_D31 | DDR2/mDDR data bus | 32-bit bidirectional data path with DQS strobes - routed as length-matched differential pairs for signal integrity |
| DSS_PCLK / DSS_HSYNC / DSS_VSYNC | Display timing signals | Pixel clock and sync signals for RGB panel interface - require controlled-impedance routing to minimize skew |
| TV_OUT1 / TV_OUT2 | Composite video outputs | Direct CVBS analog outputs (NTSC/PAL) - need AC-coupling and 75-Ω termination per TI layout rules |
| USB0_DP / USB0_DM | USB OTG physical layer | Differential pair for HS/FS/LS USB operation - routed as 90-Ω differential microstrip with <5-mil spacing |
| JTAG_TCK / TMS / TDI / TDO | IEEE-1149.1 boundary-scan | Debug and emulation interface - requires pull-up/pull-down per reset state table; no series termination needed |
Key Features
| Feature | Design Value |
|---|---|
| PowerVR SGX Graphics Accelerator | Tile-based 3D engine with OpenGLES 1.1/2.0 and OpenVG 1.0 API support - enables hardware-accelerated UI compositing without CPU load |
| Dual-Output Display Subsystem | Supports simultaneous RGB + CVBS/S-Video output with independent scaling, rotation (90°/180°/270°), and color-space conversion - eliminates external video encoder |
| VPFE Video Front End | 16-bit parallel interface with REC656/CCIR656 compliance, optical black clamping, and digital black-level compensation - simplifies HD camera sensor integration |
| HECC CAN Controller | High-End CAN with message objects and FIFO - meets industrial automation requirements for deterministic fieldbus communication |
| Flexible Memory Interfaces | GPMC supports glueless NAND/NOR/SRAM with programmable timing and asynchronous protocol control - reduces BOM count for custom logic interfacing |
Applications
| Industrial HMI | Digital Signage |
|---|---|
Use Scenario: Touch-enabled operator interface in factory-floor PLC panels with real-time status visualization. IC Role / Device Role / Timing Role: Main application processor executing Linux Qt-based UI, driving 720p RGB LCD while decoding video overlays via DSS. Use Value: Integrated PowerVR SGX and dual-display pipeline eliminate external GPU and video encoder, reducing board area and power by >35%. |
Use Scenario: Network-connected retail kiosk displaying dynamic advertisements with local video playback and remote updates. IC Role / Device Role / Timing Role: System-on-chip host running Android, managing HDMI-to-RGB conversion, SD card media playback, and Ethernet firmware updates. Use Value: On-chip VPFE and DSS enable direct HDMI capture and multi-layer composition - avoids external video digitizer and scaler ICs. |
| Portable Media Player | Smart White Goods |
Use Scenario: Battery-powered handheld device playing 720p video with touch UI and stereo audio output. IC Role / Device Role / Timing Role: Application processor with NEON-accelerated video decode, McBSP-driven audio codec, and SDIO-connected storage. Use Value: 600-MHz Cortex-A8 + NEON delivers smooth 720p H.264 decode at <450 mW - extends battery life vs. discrete SoC solutions. |
Use Scenario: Refrigerator control panel with animated UI, temperature graphing, and Wi-Fi connectivity. IC Role / Device Role / Timing Role: Real-time Linux host managing sensor I/O (I²C/ADC), display refresh (RGB), and wireless stack (EMAC + USB host). Use Value: Integrated EMAC, USB host, and 186 GPIOs consolidate connectivity and control functions - cuts BOM cost by $2.10/unit vs. MCU + peripheral IC approach. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ARM-based application processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM3505ZCN | No PowerVR SGX graphics accelerator; identical pinout and memory/peripheral interfaces | Lacks hardware-accelerated 3D rendering and advanced display composition features | Select when UI is 2D-only and cost sensitivity outweighs graphics performance needs |
| AM3358BZCZ100 | Newer 1-GHz ARM Cortex-A8, PRU-ICSS for real-time I/O, but no TV-out or VPFE video input | Superior single-thread performance and industrial Ethernet support, but no native analog video I/O | Choose for deterministic industrial control where video capture/display is handled externally |
Compared with AM3505ZCN, XAM3517ZCN adds essential graphics and video I/O for rich UIs; versus AM3358BZCZ100, it retains legacy video interfaces critical for cost-sensitive consumer/industrial displays - making XAM3517ZCN optimal for video-centric edge devices requiring analog output compatibility.
Availability
XAM3517ZCN is available at Aetrix Electronics and suitable for industrial HMIs, digital signage, and portable media players requiring stable component supply across extended product lifecycles.
Supply support for XAM3517ZCN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer markets.
The Sitara™ processor family - including XAM3517ZCN - was designed for high-performance, low-power embedded applications demanding rich graphics, video I/O, and real-time OS support in space-constrained designs.
FAQ
What distinguishes XAM3517ZCN from AM3505ZCN?
XAM3517ZCN includes the PowerVR SGX graphics accelerator and full TV-out capability (CVBS/S-Video), while AM3505ZCN omits both. The XAM3517ZCN also enables VPFE video capture and dual-display composition - critical for digital signage and media player use cases where AM3505ZCN would require external video ICs.
Does XAM3517ZCN support Linux and Android operating systems?
Yes, XAM3517ZCN is fully supported by TI's Linux SDK (including mainline kernel drivers) and Android BSPs. Its ARM Cortex-A8 core, NEON coprocessor, and memory subsystem meet the minimum requirements for Android 4.x and later, with verified boot, graphics, and display stack integration.
What is the function of the ZCN suffix in XAM3517ZCN?
The ZCN suffix denotes the 491-pin NFBGA package (17.10 mm × 17.10 mm, 0.65-mm pitch) with Via Channel™ array technology. This package variant supports TV-out functionality and differs from the ZER (484-pin PBGA) variant, which lacks TV-out pins and uses a larger 1-mm pitch footprint.
Can XAM3517ZCN interface directly with DDR2 SDRAM?
Yes, XAM3517ZCN integrates a dedicated SDRC (Synchronous DRAM Controller) supporting 16-/32-bit DDR2 and mDDR at up to 166 MHz. It provides all necessary control, address, data, and DQS signals - requiring only compliant DDR2 chips and proper PCB layout per TI's DDR2 design guide.
What video standards does XAM3517ZCN support for analog output?
XAM3517ZCN supports NTSC and PAL composite video (CVBS) output via dedicated TV_OUT1/TV_OUT2 pins, and S-Video output using separate luma/chroma signals. These outputs comply with ITU-R BT.601 and EIA-770.1 standards and require no external encoder - confirmed in Section 1.1 and Figure 1-1 of SPRS550F.
XAM3517ZCN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 491-LFBGA
- Series:
- Sitara™
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A8
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 600MHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- LPDDR, DDR2
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (3), USB 2.0 + PHY (1)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- 0°C ~ 90°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Cryptography
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 491-NFBGA (17x17)
- Additional Interfaces:
- CAN, HDQ/1-Wire, I2C, McBSP, McSPI, MMC/SD/SDIO, UART
XAM3517ZCN FAQ
1.How can I place an order for XAM3517ZCN through Aetrix?
Please submit a Request for Quotation (RFQ) for XAM3517ZCN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XAM3517ZCN reliable?
The price and inventory of XAM3517ZCN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XAM3517ZCN is usually 5 days.
3.What payment methods are accepted for XAM3517ZCN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XAM3517ZCN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XAM3517ZCN?
XAM3517ZCN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XAM3517ZCN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XAM3517ZCN?
For technical support, including XAM3517ZCN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XAM3517ZCN requirements.
6.How does Aetrix verify that XAM3517ZCN is sourced from the original manufacturer or authorized distributors?
All XAM3517ZCN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XAM3517ZCN meets industry standards.
7.What is the process for return or replacement of XAM3517ZCN?
All XAM3517ZCN units undergo pre-shipment inspection (PSI). If there is an issue with XAM3517ZCN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XAM3517ZCN part is unused and in its original packaging.
Return procedure for XAM3517ZCN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
XAM3517ZCN Tags

-
AT91SAM9260B-CU-999
Microchip Technology

-
AT91SAM9G25-CU
Microchip Technology

-
ATSAMA5D27C-CU
Microchip Technology

-
AT91SAM9X35-CU
Microchip Technology

-
AT91SAM9X25-CU
Microchip Technology

-
MCIMX6Y2CVM08AB
NXP Semiconductors
-
AM3352BZCZ100
Texas Instruments

-
AT91SAM9260B-CU
Microchip Technology

-
AT91SAM9260B-QU
Microchip Technology

-
ATSAMA5D31A-CU
Microchip Technology

-
AT91SAM9G20B-CU-999
Microchip Technology

-
MCIMX6Y2CVM05AB
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

