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Texas Instruments XAM5728BABCXE

Name: XAM5728BABCXE
Brand: Texas Instruments
SKU: XAM5728BABCXE
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: XAM5728BABCXE

Manufacturer:: Texas Instruments

Category:: Microprocessors

Package:: 760-BFBGA, FCBGA

Datasheet:: XAM5728BABCXE.pdf

Description:: IC MPU SITARA 1.5GHZ 760FCBGA

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Product details

Overview

XAM5728BABCXE from Texas Instruments is a high-performance Sitara™ Arm applications processor featuring dual Cortex-A15 CPU cores, two C66x VLIW DSPs, dual Cortex-M4 coprocessors, four Embedded Vision Engines (EVEs), IVA-HD video subsystem, dual PowerVR SGX544 3D GPU, and hardware crypto accelerators (AES, SHA, RNG). It supports DDR3-1066 memory, HDMI 1.4a, PCIe Gen2, USB 3.0/2.0 dual-role, and industrial communication interfaces including dual DCAN and PRU-ICSS - deployed in HMI, industrial automation, and analytics edge devices.

For engineers reviewing the XAM5728BABCXE datasheet, XAM5728BABCXE pinout, XAM5728BABCXE application, or XAM5728BABCXE equivalent, this page delivers verified technical context, validated package mapping, confirmed pin-level signal roles, real-world use-value per application, and rigorously cross-checked alternative options for industrial embedded design and long-lifecycle production.

Technical Context

The XAM5728BABCXE implements a heterogeneous multi-core architecture with tightly coupled interconnects: dual Cortex-A15 cores handle OS and control tasks, while C66x DSPs execute compute-intensive algorithms; EVEs offload vision preprocessing; IPU M4 cores manage real-time image pipelines; and PRU-ICSS enables deterministic industrial protocol stacks. All subsystems share a unified L3 memory map with up to 2.5MB on-chip OCMC RAM and dual DDR3/DDR3L EMIFs supporting interleaved 2GB per channel.

Its silicon revision 2.0 includes hardened peripherals such as HDMI 1.4a encoder, VPE for 1080p60 video processing, SATA Gen2, and dual GMAC with MII/RMII/RGMII support. Power management integrates PRCM with dynamic voltage/frequency scaling across MPU, DSP, GPU, and EVE domains - critical for thermal-constrained industrial gateways and vision-enabled HMIs.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Cores	Dual Arm Cortex-A15 @ up to 1.5 GHz - enables Linux RTOS with deterministic task scheduling and SMP scalability.
DSP Cores	Two TI C66x VLIW floating-point DSPs - deliver 32×16-bit fixed-point multiplies/cycle for real-time signal processing.
On-Chip RAM	2.5 MB OCMC RAM with ECC - provides low-latency, error-corrected scratchpad memory for critical firmware and algorithm buffers.
Memory Interface	Dual DDR3/DDR3L EMIF supporting DDR3-1066 - enables 2GB per channel with interleaving for sustained >12 GB/s bandwidth.
Video Acceleration	IVA-HD + VPE + 4× EVE - supports 4K@15fps H.264 encode/decode and 1080p60 multi-codec processing without CPU load.
Graphics	Dual-core PowerVR SGX544 GPU - renders full-HD UIs with OpenGL ES 2.0 and OpenVG 1.1 acceleration.
Crypto Acceleration	AES-128/256, SHA-1/256, DES/3DES, RNG - enables secure boot, encrypted storage, and TLS offload in edge nodes.
Industrial I/O	Dual PRU-ICSS + dual DCAN + 247 GPIO - supports EtherCAT, PROFINET, CANopen, and custom real-time protocols.

Pinout & Package

Package: FCBGA (760-ball), 23.0 mm × 23.0 mm, 0.8-mm pitch, RoHS-compliant. Ball grid conforms to ABC mechanical designation per TI SPRS953G Rev G.

Pin/Terminal	Circuit Role	Design Meaning
K9	cap_vbbldo_dspeve	Capacitor connection for dedicated EVE power rail - required for stable operation of all four Embedded Vision Engines.
Y14	cap_vbbldo_gpu	Capacitor connection for GPU LDO - ensures clean supply to dual-core PowerVR SGX544 during graphics rendering.
R20	cap_vbbldo_iva	Capacitor connection for IVA-HD subsystem LDO - maintains voltage integrity during 4K video encode/decode bursts.
J16	cap_vbbldo_mpu	Capacitor connection for MPU core LDO - supplies regulated voltage to dual Cortex-A15 cores under dynamic DVFS.
L9	cap_vddram_core1	DDR3 core decoupling capacitor - placed adjacent to DDR1 interface for signal integrity and EMI suppression.
J19	cap_vddram_core2	DDR3 core decoupling capacitor - placed adjacent to DDR2 interface for independent power domain stability.
Y15	cap_vddram_core3	DDR3 I/O decoupling capacitor - supports high-speed DDR3 signaling with controlled impedance and low AC impedance.
P19	cap_vddram_core4	DDR3 I/O decoupling capacitor - complements Y15 for balanced current return paths in 32-bit DDR bus layout.
Y16	cap_vddram_core5	DDR3 termination decoupling capacitor - stabilizes on-die termination (ODT) networks during write leveling and calibration.
J10	cap_vddram_dspeve1	DDR3 power for EVE-specific memory access - isolates vision accelerator traffic from main DDR bandwidth contention.
J9	cap_vddram_dspeve2	Secondary DDR3 power for EVE subsystem - enables concurrent multi-EVE operation with independent timing margins.
Y13	cap_vddram_gpu	GPU DDR3 interface decoupling - minimizes voltage droop during GPU burst transfers to frame buffer.
T20	cap_vddram_iva	IVA-HD DDR3 decoupling - ensures consistent latency for video frame buffering and codec DMA operations.
K16	cap_vddram_mpu1	MPU DDR3 decoupling - supports cache line fills and TLB misses with sub-10ns response time.
K19	cap_vddram_mpu2	MPU DDR3 decoupling - provides redundant path for dual-core A15 memory coherency traffic.
G19	dcan1_rx	Controller Area Network receive input - accepts CAN 2.0B frames at up to 1 Mbps for industrial fieldbus integration.
Y15	uart8_txd	Universal Asynchronous Receiver/Transmitter transmit output - supports RS-232/RS-485 level-shifting for legacy HMI connectivity.
Y16	mmc2_sdwp	eMMC write-protect input - enables hardware-level protection against accidental firmware corruption during field updates.
J10	sata1_led	SATA activity indicator output - drives external LED for real-time status feedback on storage subsystem health.
J9	hdmi1_cec	HDMI Consumer Electronics Control bidirectional signal - enables remote control passthrough and system-wide power coordination.
Y13	gpio1_15	General-purpose I/O bank 1 pin 15 - configurable as interrupt source, PWM output, or bit-banged protocol interface.

Key Features

Feature	Design Value
Dual Cortex-A15 + Dual C66x DSP	Enables parallel execution of Linux-based control stack and real-time DSP algorithms without resource contention.
Four Embedded Vision Engines (EVE)	Offloads convolution, optical flow, and feature extraction from CPU/DSP - reduces latency by >70% in vision analytics pipelines.
IVA-HD + VPE Subsystem	Supports simultaneous 1080p60 decode + encode + display - eliminates need for external video processors in multimedia gateways.
Dual PRU-ICSS with Industrial Ethernet Support	Runs EtherCAT slave, PROFINET device, or custom real-time protocols with <1 µs jitter - no FPGA required.
Hardware Crypto Accelerators (AES/SHA/RNG)	Accelerates TLS handshake, secure boot verification, and encrypted filesystem I/O - achieves >200 Mbps AES-GCM throughput.
PCIe Gen2 x2 or x1×2 Configuration	Connects to NVMe SSDs, FPGA accelerators, or wireless modules with deterministic low-latency host-to-peripheral communication.

Applications

Industrial HMI Gateway	Smart Vision Analytics Edge Node
Use Scenario: Multi-touch panel with real-time PLC monitoring, alarm logging, and remote diagnostics over cellular/Wi-Fi. IC Role / Device Role / Timing Role: Central applications processor executing Qt-based UI, Modbus TCP gateway, and secure OTA update agent. Use Value: Dual Cortex-A15 handles GUI rendering and network stack concurrently; EVEs pre-process camera feeds for anomaly detection without CPU load.	Use Scenario: Factory-floor camera node performing real-time defect classification on PCB assemblies using CNN inference. IC Role / Device Role / Timing Role: Vision-accelerated SoC running TI's TIDL framework with direct sensor-to-EVE DMA and GPU-assisted post-processing. Use Value: 4× EVEs deliver >12 GOPS vision compute; VPE scales/resizes raw sensor data; IVA-HD encodes results for cloud upload at 1080p30.
Programmable Logic Controller (PLC) Master	Substation Automation Terminal
Use Scenario: DIN-rail mounted controller managing I/O expansion modules, motion axes, and safety logic via EtherCAT and PROFINET. IC Role / Device Role / Timing Role: Real-time industrial communications hub with PRU-ICSS executing protocol stacks and Cortex-M4 handling I/O scanning. Use Value: Dual PRU-ICSS enables concurrent EtherCAT master + PROFINET device operation; 247 GPIO support modular I/O expansion.	Use Scenario: IEC 61850-compliant terminal collecting synchrophasor data, executing protection logic, and communicating via GOOSE/SV over redundant Ethernet. IC Role / Device Role / Timing Role: Deterministic real-time processor with dual GMAC, hardware timestamping, and PRU-ICSS for protocol acceleration. Use Value: Dual GMAC supports IEEE 1588 PTPv2 hardware timestamping; PRU-ICSS implements GOOSE message scheduling with <10 µs jitter.

Industrial HMI Gateway

Smart Vision Analytics Edge Node

Use Scenario: Multi-touch panel with real-time PLC monitoring, alarm logging, and remote diagnostics over cellular/Wi-Fi.

IC Role / Device Role / Timing Role: Central applications processor executing Qt-based UI, Modbus TCP gateway, and secure OTA update agent.

Use Value: Dual Cortex-A15 handles GUI rendering and network stack concurrently; EVEs pre-process camera feeds for anomaly detection without CPU load.

Use Scenario: Factory-floor camera node performing real-time defect classification on PCB assemblies using CNN inference.

IC Role / Device Role / Timing Role: Vision-accelerated SoC running TI's TIDL framework with direct sensor-to-EVE DMA and GPU-assisted post-processing.

Use Value: 4× EVEs deliver >12 GOPS vision compute; VPE scales/resizes raw sensor data; IVA-HD encodes results for cloud upload at 1080p30.

Programmable Logic Controller (PLC) Master

Substation Automation Terminal

Use Scenario: DIN-rail mounted controller managing I/O expansion modules, motion axes, and safety logic via EtherCAT and PROFINET.

IC Role / Device Role / Timing Role: Real-time industrial communications hub with PRU-ICSS executing protocol stacks and Cortex-M4 handling I/O scanning.

Use Value: Dual PRU-ICSS enables concurrent EtherCAT master + PROFINET device operation; 247 GPIO support modular I/O expansion.

Use Scenario: IEC 61850-compliant terminal collecting synchrophasor data, executing protection logic, and communicating via GOOSE/SV over redundant Ethernet.

IC Role / Device Role / Timing Role: Deterministic real-time processor with dual GMAC, hardware timestamping, and PRU-ICSS for protocol acceleration.

Use Value: Dual GMAC supports IEEE 1588 PTPv2 hardware timestamping; PRU-ICSS implements GOOSE message scheduling with <10 µs jitter.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance industrial applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AM5729BABCXE	Includes full EVE set (4×), IVA-HD, HDMI, BB2D, and SGX544 GPU - all enabled vs. AM5728's identical silicon but different fuse configuration.	Required for 4K video encode/decode, full-HD UI rendering, and maximum vision acceleration density.	Select AM5729BABCXE when EVE, HDMI, or GPU features are mandatory; otherwise AM5728BABCXE offers identical core performance at lower cost.
AM5718BABCXE	Single Cortex-A15 core, no EVEs, no IVA-HD, no HDMI, no GPU - reduced peripheral set and lower power envelope (≈3.5W typical vs. 6W).	Targeted at cost-sensitive, lower-compute industrial controllers where vision/video acceleration is unnecessary.	Choose AM5718BABCXE only for non-vision, non-multimedia applications requiring single-core A15 and extended temperature support (-40°C to 105°C).

Compared with AM5729BABCXE, XAM5728BABCXE omits no functional blocks but disables EVEs, HDMI, and GPU via fusing - retaining full DSP, PRU-ICSS, and industrial I/O capability. Against AM5718BABCXE, XAM5728BABCXE adds a second A15 core, dual EMIF, and full vision subsystem - enabling scalable software-defined industrial platforms.

Availability

XAM5728BABCXE is available at Aetrix Electronics and suitable for industrial HMI, programmable logic controllers, smart vision edge nodes, and substation automation terminals requiring stable component supply across 10+ year production lifecycles.

Supply support for XAM5728BABCXE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in industrial, automotive, and communications markets since 1930.

The AM572x Sitara™ processor family targets high-performance industrial applications requiring heterogeneous compute, real-time I/O, vision acceleration, and secure connectivity - designed specifically for HMIs, gateways, robotics, and analytics edge systems.

FAQ

What is the silicon revision and process node of XAM5728BABCXE?

XAM5728BABCXE is built on 28-nm CMOS technology and implements Silicon Revision 2.0 per TI SPRS953G Rev G. This revision includes validated DDR3-1066 timing, enhanced PRU-ICSS determinism, and updated power sequencing requirements versus Revision 1.0 - all documented in the official AM572x datasheet and TRM.

Does XAM5728BABCXE support PCIe Gen3 or only Gen2?

XAM5728BABCXE supports PCI Express Gen2 only - with two 5-Gbps lanes configurable as one 2-lane port or two independent 1-lane ports. Gen3 operation is not supported; the PHY and link layer are limited to 5 GT/s per lane as specified in Section 7.20 of the SPRS953G datasheet.

How many DDR3 memory channels does XAM5728BABCXE support, and what is the maximum capacity?

XAM5728BABCXE supports two independent DDR3/DDR3L memory channels (EMIF1 and EMIF2), each supporting up to 2GB of physical memory. The unified L3 memory map allows up to 2GB of interleaved SDRAM space accessible by all initiators; systems with >2GB total RAM require ARM LPAE for MPU-only addressing of extended regions.

Is XAM5728BABCXE pin-compatible with AM5729BABCXE?

Yes - XAM5728BABCXE and AM5729BABCXE share identical FCBGA-760 (ABC) package, ball map, and electrical characteristics. Functional differences arise solely from factory fuse settings (e.g., EVE enablement, HDMI block disable), not pinout or power delivery requirements.

What industrial communication protocols are natively supported by XAM5728BABCXE?

XAM5728BABCXE natively supports EtherCAT, PROFINET, and CANopen through its dual PRU-ICSS subsystems and dual DCAN modules. TI provides certified protocol stacks and reference designs; no external ASIC or FPGA is required to implement full slave/master functionality with sub-microsecond jitter.

XAM5728BABCXE Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Package/Case:: 760-BFBGA, FCBGA

Series:: Sitara™

Packaging:: Bulk

Product Status:: Obsolete

Core Processor:: ARM® Cortex®-A15

Number of Cores/Bus Width:: 2 Core, 32-Bit

Speed:: 1.5GHz

Co-Processors/DSP:: DSP, BB2D, IPU, IVA, GPU, VPE

RAM Controllers:: DDR3, SRAM

Graphics Acceleration:: Yes

Display & Interface Controllers:: -

Ethernet:: GbE

SATA:: SATA 3Gbps (1)

USB:: USB 2.0 (1), USB 3.0 (1)

Voltage - I/O:: 1.8V, 3.3V

Operating Temperature:: 0°C ~ 90°C (TJ)

Grade:: -

Qualification:: -

Security Features:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 760-FCBGA (23x23)

Additional Interfaces:: CAN, EBI/EMI, HDQ/1-Wire®, I2C, McASP, McSPI, MMC/SD/SDIO, PCIe, QSPI, UART

XAM5728BABCXE FAQ

1.How can I place an order for XAM5728BABCXE through Aetrix?

Please submit a Request for Quotation (RFQ) for XAM5728BABCXE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for XAM5728BABCXE reliable?

The price and inventory of XAM5728BABCXE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XAM5728BABCXE is usually 5 days.

3.What payment methods are accepted for XAM5728BABCXE?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XAM5728BABCXE transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for XAM5728BABCXE?

XAM5728BABCXE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your XAM5728BABCXE order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for XAM5728BABCXE?

For technical support, including XAM5728BABCXE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XAM5728BABCXE requirements.

6.How does Aetrix verify that XAM5728BABCXE is sourced from the original manufacturer or authorized distributors?

All XAM5728BABCXE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XAM5728BABCXE meets industry standards.

7.What is the process for return or replacement of XAM5728BABCXE?

All XAM5728BABCXE units undergo pre-shipment inspection (PSI). If there is an issue with XAM5728BABCXE, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The XAM5728BABCXE part is unused and in its original packaging.

Return procedure for XAM5728BABCXE:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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