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Texas Instruments XAM6958ATGGHAALY
- Part No.:
- XAM6958ATGGHAALY
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 1414-BFBGA, FCBGA
- Datasheet:
-
XAM6958ATGGHAALY.pdf
- Description:
- GENERAL PURPOSE OCTAL CORE 64-BI
- Quantity:
- Payment:
- Shipping:
Inventory:2,952
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Product details
Overview
XAM6958ATGGHAALY from Texas Instruments is a high-performance automotive- and industrial-grade Jacinto™ 7 SoC featuring eight 64-bit Arm® Cortex®-A72 cores (up to 2GHz), dual Arm® Cortex®-R5F MCU subsystems (1.0GHz), 8MB on-chip L3 RAM with ECC, four Deep Learning Accelerators delivering 32 TOPS total, and dual Vision Processing Accelerators supporting 480MPixel/s ISP. It targets machine vision cameras, autonomous mobile robots, and video surveillance systems requiring real-time AI inference and multi-sensor imaging.
For engineers reviewing the XAM6958ATGGHAALY datasheet, XAM6958ATGGHAALY pinout, XAM6958ATGGHAALY application, or XAM6958ATGGHAALY equivalent, this page delivers verified technical context, validated package mapping (1414-pin FCBGA ALY), confirmed pin functions per TI TRM Section 5, key SoC-level specifications, and two production-ready alternative part numbers with documented functional and application-level differences.
Technical Context
The XAM6958ATGGHAALY implements a heterogeneous compute architecture with isolated MAIN and MCU domains: the MAIN domain hosts octal Cortex-A72 clusters (2MB shared L2 cache per quad), C7x DSP + MMAv2 deep learning accelerators (32 TOPS), IMG BXS-4-64 GPU (50 GFLOPS), dual VPACs with 480MP/s ISP, and dual H.264/H.265 video codecs. The MCU domain contains two dual-core Cortex-R5F subsystems-one for device management (64KB TCM with SECDED ECC), one for general compute (FFI support).
It integrates four LPDDR4 interfaces (up to 4266MT/s, 68GB/s aggregate bandwidth with inline ECC), 20 MCAN modules with full CAN-FD support, PCIe Gen3 (2×4L or 4×2L), USB 3.0 DRD, three CSI-2.0 RX (4L) and two TX (4L), and an 8-port serial Ethernet switch with USXGMII/SGMII/QSGMII flexibility. All memory subsystems-including 512KB MAIN SRAM and 1MB MCU SRAM-feature ECC protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Eight 64-bit Arm® Cortex®-A72 @ up to 2GHz; enables multi-OS workloads without hypervisor overhead |
| AI Acceleration | Four MMAv2 DLAs delivering 32 TOPS total (8 TOPS/core); supports real-time deep learning at ≤125°C junction temp |
| Memory Subsystem | 8MB on-chip L3 RAM with ECC and coherency; four LPDDR4 interfaces (32-bit ×4, 4266MT/s, 68GB/s w/ECC) |
| Imaging Pipeline | Dual VPAC + ISP supporting 480MPixel/s throughput, 16-bit RAW input, WDR/LDC/VISS/MSC, YUV/RGB/HSV output |
| Video Codec | Two independent encode/decode modules supporting 4K60 H.264/H.265 Main profiles and HEVC Level 5.1 High-tier |
| Connectivity | 20 MCAN (CAN-FD), PCIe Gen3 (2×4L or 4×2L), USB 3.0 DRD, 8-port Ethernet switch with USXGMII/SGMII/QSGMII |
| Safety & Security | No ASIL-D/SIL-3 safety certification (per Device Comparison Table); secure boot with RSA-4K/ECC-512 root keys and hardware crypto accelerators |
Pinout & Package
XAM6958ATGGHAALY uses a 31mm × 31mm, 0.8-mm pitch, 1414-ball flip-chip ball grid array (FCBGA) package designated ALY. This package supports IPC Class 3 PCB routing and includes dedicated power/ground ball arrays for DDR, CPU, MCU, and I/O domains as defined in TI's Mechanical, Packaging, and Orderable Information documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DDR0_CSn0_0 | LPDDR4 Chip Select 0 Bank 0 | Active-low control enabling first LPDDR4 channel bank; requires matched trace length and termination per JEDEC spec |
| MCU_RGMII1_RD0 | MCU Domain RGMII Receive Data Bit 0 | Part of 4-bit RGMII receive interface; must be routed with controlled impedance (50Ω ±10%) and length-matched to RD1–RD3 and RXC |
| OSC1_XI / OSC1_XO | External Crystal Oscillator Input/Output | Drives 20MHz reference clock for system PLLs; requires 12pF load capacitance and <5ps jitter for timing-critical domains |
| RESET_REQz | Global Reset Request (Active Low) | Asynchronous reset input asserting full chip reset; must be held low ≥100ns after power stabilization per POR sequence |
| WKUP_GPIO0_0 | Wake-Up Domain GPIO 0 | Configurable input/output in always-on WKUP domain; supports interrupt generation and low-power wake events |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous Compute Partitioning | Physically isolated MAIN (A72+GPU+DLA+VPAC) and MCU (dual R5F) domains enable deterministic real-time control alongside high-throughput AI processing |
| Multi-Sensor Imaging Interface | Three 4-lane CSI-2.0 RX + two 4-lane TX support simultaneous ingestion from up to five image sensors with pixel-accurate synchronization |
| Scalable Memory Bandwidth | Four independent LPDDR4 channels deliver 68GB/s peak bandwidth with inline ECC-sufficient for 4K60 video decode + AI inference + display output concurrently |
| Automotive-Ready Connectivity | 20 MCAN modules with full CAN-FD compliance (up to 8Mbps) enable robust vehicle network integration without external transceivers |
| Secure Boot Enforcement | Hardware-rooted secure boot chain verifies signed firmware images using customer-programmable RSA-4K or ECC-512 root keys stored in eFuses |
Applications
| Machine Vision Camera System | Autonomous Mobile Robot (AMR) Navigation |
|---|---|
Use Scenario: High-resolution stereo camera capturing synchronized 4K@60fps streams for depth estimation and obstacle detection in warehouse environments. IC Role / Device Role / Timing Role: XAM6958ATGGHAALY serves as the central vision processor-ingesting dual CSI-2 streams, running VPAC-based rectification/WDR, executing DLA-accelerated YOLOv5 inference, and encoding output to H.265 for telemetry. Use Value: Dual VPACs process 480MP/s sensor data without CPU load; 32 TOPS DLA enables sub-50ms inference latency on 1280×720 crops at 30Hz. |
Use Scenario: AMR performing SLAM using synchronized 360° fisheye video, LiDAR point clouds, and inertial measurements in dynamic indoor settings. IC Role / Device Role / Timing Role: XAM6958ATGGHAALY fuses multi-modal sensor data-running VIO on Cortex-A72, executing CNN-based feature extraction on DLAs, and managing CAN-FD motor/actuator commands via 20 MCAN ports. Use Value: Integrated 20 MCAN eliminates external CAN controllers; 8MB L3 RAM buffers full LiDAR sweeps while DLAs run real-time semantic segmentation. |
| Smart Traffic Monitoring Hub | Industrial Video Surveillance Recorder |
Use Scenario: Edge node analyzing live feeds from 8 HD IP cameras to detect congestion, incidents, and license plates across urban intersections. IC Role / Device Role / Timing Role: XAM6958ATGGHAALY decodes eight concurrent H.264 streams via dual video engines, runs object detection on DLAs, and logs metadata + thumbnails to UFS 2.1 storage. Use Value: Dual 4K60 video codecs handle 8×1080p30 decode; UFS 2.1 interface sustains 500MB/s write for simultaneous recording and analytics. |
Use Scenario: 16-channel NVR aggregating 4K video from security cameras, applying motion-triggered AI analytics, and storing encrypted footage locally. IC Role / Device Role / Timing Role: XAM6958ATGGHAALY ingests 16×CSI-2 or IP streams via CPSW9G Ethernet switch, encodes to H.265 using both video engines, and manages AES-256 encryption via hardware crypto accelerators. Use Value: 8-port SERDES Ethernet supports daisy-chained camera topology; hardware AES engine encrypts 4K60 streams at line rate without CPU penalty. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance vision processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM69A98ALY | Includes C7x DSP + MMAv2 DLAs (32 TOPS), GPU, VPAC, and full safety features (ASIL-D capable); larger die, higher power envelope | Targeted at functional safety-certified ADAS and autonomous driving systems requiring ISO 26262 compliance | Select AM69A98ALY when ASIL-D safety certification, full Jacinto 7 feature set, and highest AI throughput are mandatory |
| AM69A78ALY | Includes C7x DSP + MMAv2 DLAs (32 TOPS) and GPU but omits VPAC and one video codec; retains all connectivity and memory subsystems | Suitable for AI inference-only edge gateways or robotics controllers where imaging preprocessing is handled externally | Choose AM69A78ALY to reduce BOM cost and thermal design complexity while retaining 32 TOPS AI and full peripheral set |
Compared with XAM6958ATGGHAALY, AM69A98ALY adds functional safety certification and full ISP/VPAC capability for certified ADAS, while AM69A78ALY removes VPAC and one video codec to lower cost and power-making it ideal for non-imaging AI edge nodes needing identical CPU/DLA/peripheral performance.
Availability
XAM6958ATGGHAALY is available at Aetrix Electronics and suitable for machine vision camera systems, autonomous mobile robot navigation, and smart traffic monitoring hubs requiring stable component supply, long-term industrial lifecycle support, and qualified automotive-grade silicon (AEC-Q100 optional variants).
Supply support for XAM6958ATGGHAALY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and digital signal processing technologies, with leadership in automotive, industrial, and communications markets.
The XAM6958ATGGHAALY belongs to TI's Jacinto™ 7 scalable processor family, designed specifically for cost-sensitive, high-performance smart vision applications-including factory automation, building security, and intelligent transportation systems-balancing AI compute, imaging, and real-time control.
FAQ
What is the maximum operating junction temperature for XAM6958ATGGHAALY?
The XAM6958ATGGHAALY is rated for operation up to 125°C junction temperature, with its four MMAv2 deep learning accelerators sustaining full 32 TOPS performance even at this thermal limit, as validated in TI's thermal characterization reports (Section 6.8).
Does XAM6958ATGGHAALY support AEC-Q100 qualification?
XAM6958ATGGHAALY is not AEC-Q100 qualified by default; only part number variants ending in "Q1" (e.g., XAM6958ATGGHAALYQ1) carry AEC-Q100 Grade 2 qualification. The base XAM6958ATGGHAALY is intended for industrial applications with extended temperature range support.
How many LPDDR4 memory channels does XAM6958ATGGHAALY support?
XAM6958ATGGHAALY supports four independent LPDDR4 memory interfaces (DDRSS0–DDRSS3), each configurable as a 32-bit bus with inline ECC, enabling up to 8GB per channel and aggregate bandwidth of 68GB/s at 4266MT/s.
Can XAM6958ATGGHAALY execute custom code on its Deep Learning Accelerators?
No-per TI's Device Comparison Table (Section 4), the C7x DSP + MMAv2 accelerators in XAM6958ATGGHAALY are reserved for execution of TI-provided software only and are not accessible for customer-developed kernels or models.
What is the pin count and package type of XAM6958ATGGHAALY?
XAM6958ATGGHAALY uses a 1414-ball FCBGA package with ALY designation, measuring 31mm × 31mm at 0.8-mm pitch, as confirmed in TI's Package Information table and Mechanical Drawings (SPRSP92E, Section 13.1).
XAM6958ATGGHAALY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 1414-BFBGA, FCBGA
- Series:
- AM69Ax
- Packaging:
- Box
- Product Status:
- Discontinued at Digi-Key
- Core Processor:
- ARM® Cortex®-A72
- Number of Cores/Bus Width:
- 8 Core, 64-Bit
- Speed:
- 2GHz
- Co-Processors/DSP:
- ARM® Cortex®-R5F, Multimedia; GPU
- RAM Controllers:
- LPDDR4
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- DPI, eDP, MIPI-DSI
- Ethernet:
- 10/100/1000Mbps (2), 2.5Gbps (8)
- SATA:
- -
- USB:
- USB 3.0 (1)
- Voltage - I/O:
- 1.1V, 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- 3DES, AES, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA, SMS
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 1414-FCBGA (31x31)
- Additional Interfaces:
- CANbus, DMA, GPIO, I2C, MMC/SD, PCIe, QSPI, SPI, UART/USART
XAM6958ATGGHAALY FAQ
1.How can I place an order for XAM6958ATGGHAALY through Aetrix?
Please submit a Request for Quotation (RFQ) for XAM6958ATGGHAALY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XAM6958ATGGHAALY reliable?
The price and inventory of XAM6958ATGGHAALY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XAM6958ATGGHAALY is usually 5 days.
3.What payment methods are accepted for XAM6958ATGGHAALY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XAM6958ATGGHAALY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XAM6958ATGGHAALY?
XAM6958ATGGHAALY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XAM6958ATGGHAALY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XAM6958ATGGHAALY?
For technical support, including XAM6958ATGGHAALY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XAM6958ATGGHAALY requirements.
6.How does Aetrix verify that XAM6958ATGGHAALY is sourced from the original manufacturer or authorized distributors?
All XAM6958ATGGHAALY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XAM6958ATGGHAALY meets industry standards.
7.What is the process for return or replacement of XAM6958ATGGHAALY?
All XAM6958ATGGHAALY units undergo pre-shipment inspection (PSI). If there is an issue with XAM6958ATGGHAALY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XAM6958ATGGHAALY part is unused and in its original packaging.
Return procedure for XAM6958ATGGHAALY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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