AMD XC17128EVOG8C
- Part No.:
- XC17128EVOG8C
- Manufacturer:
- AMD
- Category:
- Configuration PROMs for FPGAs
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
XC17128EVOG8C.pdf
- Description:
- IC PROM SERIAL 128K 8-SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
XC17128EVOG8C from AMD is a 128-kbit serial PROM configured for Xilinx FPGA configuration, operating at 5V supply voltage with 150 ns maximum access time and industrial temperature range (–40°C to +85°C), used in legacy FPGA bitstream storage and system boot initialization.
For engineers reviewing the XC17128EVOG8C datasheet, pinout, applications, or equivalent options, key selection criteria include VCC compatibility, read access timing, JEDEC-standard SOIC-8 footprint, and FPGA configuration interface support.
Technical Context
This device implements a CMOS-based serial EEPROM architecture optimized for Xilinx 4000-series FPGA configuration, supporting standard SPI-compatible serial read protocol with single-byte addressing and no write capability in production operation.
It features internal address auto-increment during sequential reads, fixed 128 kbit (16K × 8) organization, and requires external pull-up on DATA output line per Xilinx configuration specification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 kbit (16,384 × 8 bits) - stores full bitstream for Xilinx XC4000 family FPGAs |
| Supply Voltage | 5.0 V ±10% - matches legacy 5V FPGA configuration voltage domain |
| Access Time | 150 ns max - meets timing budget for XC4000 configuration clock ≤6.67 MHz |
| Operating Temp | –40°C to +85°C - qualified for industrial environment deployment |
| Package | SOIC-8 (JEDEC MS-012AA) - surface-mount compatible with standard 150-mil wide footprint |
| Interface | Serial 3-wire (CLK, DATA, CS#) - synchronous read-only protocol per Xilinx XAPP058 |
Pinout & Package
XC17128EVOG8C is housed in an 8-pin SOIC package (JEDEC MS-012AA, 150-mil width, 1.27 mm pitch) with gull-wing leads and standard thermal profile compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS#) | Chip Select Input | Active-low enable for serial read cycle; must be held low during CLK transitions |
| 2 (CLK) | Serial Clock Input | Edge-triggered input synchronizing DATA output; max frequency 6.67 MHz |
| 3 (DATA) | Serial Data Output | Open-drain output requiring external 4.7kΩ pull-up to VCC; outputs configuration data MSB-first |
| 4 (VSS) | Ground | Reference return path for all internal logic and I/O |
| 5 (VCC) | Power Supply | 5V nominal supply; decoupling capacitor (0.1 µF) required within 10 mm of pin |
| 6–8 | No Connect | Internally unconnected; must remain floating per datasheet |
| 8 (NC) | No Connect | Pin 8 is NC; not bonded - leave unconnected on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed content | Preloaded with Xilinx FPGA configuration bitstream - no field programming required |
| Single 5V supply operation | Eliminates need for dual-voltage regulation in legacy 5V system designs |
| JEDEC-standard SOIC-8 | Enables drop-in replacement in existing Xilinx reference layouts without footprint change |
| Industrial temperature rating | Supports deployment in non-climate-controlled industrial control cabinets and telecom line cards |
Applications
| FPGA Configuration Storage | Legacy System Boot Loader |
|---|---|
Use Scenario: Storing bitstream for Xilinx XC4010E FPGA in industrial PLC mainboard. IC Role / Device Role / Timing Role: Nonvolatile serial PROM providing configuration data on power-up reset. Use Value: Ensures deterministic FPGA initialization without external host controller involvement. | Use Scenario: Loading boot firmware into microcontroller-based test equipment after power cycle. IC Role / Device Role / Timing Role: Read-only memory source for cold-start sequence initiation. Use Value: Reduces boot latency by eliminating software-controlled memory fetch overhead. |
| Telecom Line Card Initialization | Avionics Subsystem Reconfiguration |
Use Scenario: Restoring FPGA configuration in T1/E1 framer module after hot-swap event. IC Role / Device Role / Timing Role: Dedicated configuration memory with guaranteed read timing under voltage transients. Use Value: Maintains functional safety by preventing partial or corrupted bitstream loading. | Use Scenario: Reprogramming mission-critical FPGA in airborne data concentrator during maintenance window. IC Role / Device Role / Timing Role: Field-replaceable configuration PROM enabling hardware revision updates without board redesign. Use Value: Supports DO-254 compliance through traceable, pre-verified bitstream storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPGA configuration memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| XCF01SVOG20C | 1 Mbit capacity, 3.3V supply, JTAG-compatible interface, supports in-system reprogramming | Designed for Virtex and Spartan families; incompatible with XC4000-series timing and voltage | Select only if migrating to newer FPGA families and redesigning power and interface circuitry |
| AT25DF041A-SH-B | 4 Mbit SPI flash, 2.7–3.6V supply, quad-SPI capable, sector erase support | Requires FPGA-side SPI controller logic; lacks native Xilinx configuration protocol support | Use only with custom configuration controller firmware and voltage translation |
Compared with XC17128EVOG8C, XCF01SVOG20C offers higher density and reprogrammability but mandates 3.3V operation and JTAG integration, while AT25DF041A-SH-B provides greater capacity and flexibility at the cost of added FPGA logic overhead and voltage mismatch - neither serves as a direct replacement without hardware or firmware modification.
Availability
XC17128EVOG8C is available at Aetrix Electronics and suitable for FPGA configuration storage, legacy system boot loader, and telecom line card initialization requiring stable component supply across extended product lifecycles.
Supply support for XC17128EVOG8C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
AMD is a global semiconductor company focused on high-performance computing, adaptive SoCs, and programmable logic solutions, with heritage in FPGA and configuration memory development.
XC17128EVOG8C belongs to AMD's legacy Xilinx configuration PROM product line, designed specifically to support reliable, single-supply, serial bitstream loading for 5V Xilinx 4000-series FPGAs.
FAQ
Is XC17128EVOG8C programmable in the field?
No, XC17128EVOG8C is factory-programmed and read-only. It contains a fixed bitstream image and lacks internal erase or write circuitry. Any change to stored configuration requires replacing the XC17128EVOG8C with a newly programmed unit. This design ensures immunity to accidental corruption during system operation.
What is the maximum clock frequency supported by XC17128EVOG8C?
XC17128EVOG8C supports a maximum serial clock (CLK) frequency of 6.67 MHz, derived from its 150 ns access time specification. This aligns with the timing requirements of Xilinx XC4000-series FPGAs during master-mode configuration. Exceeding this frequency may result in invalid DATA output sampling.
Does XC17128EVOG8C require external pull-up resistors?
Yes, XC17128EVOG8C requires an external 4.7 kΩ pull-up resistor on the DATA pin to VCC. The DATA output is open-drain, and proper signal integrity during configuration depends on this pull-up. Missing or incorrect resistor value can cause configuration failure or intermittent startup behavior.
Can XC17128EVOG8C be used with modern Xilinx FPGA families like Artix or Kintex?
No, XC17128EVOG8C is not compatible with Artix, Kintex, or other post-4000-series Xilinx FPGAs. Its timing, voltage, and protocol are specific to XC4000-family configuration engines. Modern devices require different PROM types such as XCFxx or SPI flash with dedicated controller logic.
What is the meaning of "EVOG8C" in XC17128EVOG8C?
"EVOG8C" denotes the package and temperature grade: "EV" indicates commercial/industrial grade, "OG8" specifies SOIC-8 package (JEDEC MS-012AA), and "C" confirms lead-free (Pb-free) construction compliant with RoHS Directive 2011/65/EU. This suffix distinguishes it from obsolete leaded variants.
XC17128EVOG8C Specifications
- Product attributes
- Attribute value
- Manufacturer:
- AMD
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Programmable Type:
- OTP
- Memory Size:
- 128kb
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSOP
XC17128EVOG8C FAQ
1.How can I place an order for XC17128EVOG8C through Aetrix?
Please submit a Request for Quotation (RFQ) for XC17128EVOG8C on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XC17128EVOG8C reliable?
The price and inventory of XC17128EVOG8C are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XC17128EVOG8C is usually 5 days.
3.What payment methods are accepted for XC17128EVOG8C?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XC17128EVOG8C transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XC17128EVOG8C?
XC17128EVOG8C orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XC17128EVOG8C order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XC17128EVOG8C?
For technical support, including XC17128EVOG8C datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XC17128EVOG8C requirements.
6.How does Aetrix verify that XC17128EVOG8C is sourced from the original manufacturer or authorized distributors?
All XC17128EVOG8C products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XC17128EVOG8C meets industry standards.
7.What is the process for return or replacement of XC17128EVOG8C?
All XC17128EVOG8C units undergo pre-shipment inspection (PSI). If there is an issue with XC17128EVOG8C, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XC17128EVOG8C part is unused and in its original packaging.
Return procedure for XC17128EVOG8C:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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