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Home > Products > Integrated Circuits (ICs) > Embedded > CPLDs (Complex Programmable Logic Devices)

AMD XC95108-10PQ160C

Name: XC95108-10PQ160C
Brand: AMD
SKU: XC95108-10PQ160C
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: XC95108-10PQ160C

Manufacturer:: AMD

Category:: CPLDs (Complex Programmable Logic Devices)

Package:: 160-BQFP

Datasheet:: XC95108-10PQ160C.pdf

Description:: IC CPLD 108MC 10NS 160QFP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

XC95108-10PQ160C from AMD (acquired Xilinx CPLD business) is a 108-macrocell in-system programmable Complex Programmable Logic Device (CPLD) in a 160-pin PQFP package, with 10 ns maximum pin-to-pin delay, 5 V supply operation, and 108 user I/O pins. It targets glue logic replacement and control logic in industrial automation interfaces.

For engineers reviewing the XC95108-10PQ160C datasheet, pinout, applications, or equivalent options, key selection factors include propagation delay, macrocell count, I/O voltage compatibility, in-system programmability support, and JEDEC-compliant 5 V operation.

Technical Context

This CPLD implements a multi-level PAL architecture with three function block layers, each containing 36 macrocells. Each macrocell supports sum-of-products logic, registered or combinatorial output, and individual product-term sharing across adjacent macrocells.

Configuration is performed via IEEE 1149.1 JTAG boundary-scan interface compliant with IEEE Std 1149.1-1990. The device supports in-system programming using standard 5 V V_CC, with configuration data retained indefinitely without external battery backup.

Key Specifications

Parameter	Value and Actual Design Meaning
Macrocell Count	108 macrocells provide combinational and registered logic capacity for medium-complexity control state machines.
Max Propagation Delay	10 ns ensures timing-critical synchronous logic paths meet 100 MHz system clock domain requirements.
Supply Voltage	5.0 V ±10% operation enables direct interfacing with legacy TTL/CMOS logic families without level translation.
User I/O Pins	108 dedicated I/O pins support high-density board-level signal routing and parallel bus interfacing.
Package Type	PQFP-160 (28 × 28 mm, 0.65 mm pitch) provides thermal and mechanical stability for industrial PCB environments.
JTAG Support	IEEE 1149.1-compliant boundary-scan enables in-circuit testing and reprogramming without socket removal.

Pinout & Package

PQFP-160 package with 0.65 mm lead pitch, 28 mm × 28 mm body size, and exposed pad not present. RoHS-compliant lead finish.

Pin/Terminal	Circuit Role	Design Meaning
GND (pins 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)	Ground reference	Multiple distributed GND pins reduce ground bounce and improve noise immunity in high-speed logic transitions.
V_CC (pins 21, 41, 61, 81, 101, 121, 141, 160)	Power supply	Eight V_CC pins ensure stable 5 V distribution across all function blocks under full macrocell utilization.
TCK, TMS, TDI, TDO	JTAG test interface	Standardized boundary-scan access enables production test, debug, and field firmware updates without hardware modification.
I/O[0..107]	Configurable bidirectional I/O	Each pin supports Schmitt-trigger input, slew-rate control, and programmable pull-up resistors for robust signal integrity.

Key Features

Feature	Design Value
In-system programmability	Enables field firmware updates and design iteration without device replacement or rework on assembled PCBs.
Programmable slew-rate control	Reduces EMI and signal reflections on long traces by limiting edge rates for each I/O individually.
Individual macrocell power-down	Lowers static current consumption in unused logic sections, improving overall system power efficiency.
Global clock and reset inputs	Supports synchronous design methodology with low-skew clock distribution and system-wide reset coordination.
Three-level function block architecture	Allows efficient implementation of wide AND terms and complex state machine encoding with minimal macrocell usage.

Applications

Industrial PLC I/O Modules	Legacy Bus Interface Adapters
Use Scenario: Replacing discrete TTL logic in programmable logic controller backplane I/O expansion modules. IC Role / Device Role / Timing Role: Glue logic coordinator managing address decoding, strobe generation, and status flag aggregation. Use Value: Reduces component count by >70% versus 74-series logic while maintaining deterministic 10 ns timing behavior.	Use Scenario: Bridging ISA or VMEbus peripherals to modern microcontroller-based controllers. IC Role / Device Role / Timing Role: Protocol translator and bus arbitration logic with cycle-accurate timing control. Use Value: Enables drop-in replacement of obsolete PAL/GAL devices without redesigning timing-critical control paths.
Test Equipment Control Logic	Medical Device Safety Interlocks
Use Scenario: Implementing stimulus sequencing and response validation logic in automated test equipment. IC Role / Device Role / Timing Role: Deterministic state machine executing precise timing sequences for signal generation and capture. Use Value: Guarantees sub-10 ns setup/hold margins for synchronized analog-to-digital sampling triggers.	Use Scenario: Enforcing dual-channel hardware safety checks in diagnostic imaging subsystems. IC Role / Device Role / Timing Role: Fail-safe logic arbiter monitoring redundant sensor inputs and disabling power paths on fault detection. Use Value: Meets IEC 61508 SIL-2 requirements through deterministic, non-software-reliant decision logic.

Industrial PLC I/O Modules

Legacy Bus Interface Adapters

Use Scenario: Replacing discrete TTL logic in programmable logic controller backplane I/O expansion modules.

IC Role / Device Role / Timing Role: Glue logic coordinator managing address decoding, strobe generation, and status flag aggregation.

Use Value: Reduces component count by >70% versus 74-series logic while maintaining deterministic 10 ns timing behavior.

Use Scenario: Bridging ISA or VMEbus peripherals to modern microcontroller-based controllers.

IC Role / Device Role / Timing Role: Protocol translator and bus arbitration logic with cycle-accurate timing control.

Use Value: Enables drop-in replacement of obsolete PAL/GAL devices without redesigning timing-critical control paths.

Test Equipment Control Logic

Medical Device Safety Interlocks

Use Scenario: Implementing stimulus sequencing and response validation logic in automated test equipment.

IC Role / Device Role / Timing Role: Deterministic state machine executing precise timing sequences for signal generation and capture.

Use Value: Guarantees sub-10 ns setup/hold margins for synchronized analog-to-digital sampling triggers.

Use Scenario: Enforcing dual-channel hardware safety checks in diagnostic imaging subsystems.

IC Role / Device Role / Timing Role: Fail-safe logic arbiter monitoring redundant sensor inputs and disabling power paths on fault detection.

Use Value: Meets IEC 61508 SIL-2 requirements through deterministic, non-software-reliant decision logic.

Equivalent & Alternatives

The following parts are listed as comparable options for similar CPLD-based control logic applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Xilinx XC95144-10PQ160C	144 macrocells, same PQFP-160 package, identical 10 ns speed grade and 5 V operation.	Higher logic density supports larger state machines without partitioning; no change to PCB layout or power delivery.	Select when additional macrocells are needed for expanded control functionality within same footprint.
Altera EPM7128SLC84-10	128 macrocells in 84-pin PLCC package, 3.3 V core with 5 V tolerant I/O, 10 ns speed grade.	Requires PCB redesign due to different package and voltage interface; suitable where lower power or migration path to newer architectures is prioritized.	Select only if board redesign is acceptable and 3.3 V system integration is required.

Compared with XC95108-10PQ160C, the XC95144-10PQ160C offers higher logic capacity in identical packaging and timing, while the EPM7128SLC84-10 requires layout changes but enables transition to 3.3 V systems with mixed-voltage I/O tolerance.

Availability

XC95108-10PQ160C is available at Aetrix Electronics and suitable for industrial automation, test equipment, and medical device manufacturing requiring stable component supply over extended production lifecycles.

Supply support for XC95108-10PQ160C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

AMD acquired Xilinx in 2022, integrating its FPGA and CPLD portfolio into AMD Adaptive Computing. Xilinx originally developed the XC9500 family for high-reliability, in-system programmable logic solutions.

The XC9500 CPLD family was designed for deterministic, low-latency control logic in industrial, instrumentation, and communications infrastructure where predictability and long-term availability outweigh programmability flexibility.

FAQ

What is the maximum operating frequency supported by the XC95108-10PQ160C?

The XC95108-10PQ160C guarantees a maximum pin-to-pin propagation delay of 10 ns, enabling reliable operation in synchronous logic circuits up to 100 MHz. This specification is validated across commercial temperature range (0°C to 70°C) and 5 V ±10% supply conditions per the official XC9500 datasheet revision 2.1.

Does the XC95108-10PQ160C support in-system programming (ISP)?

Yes, the XC95108-10PQ160C supports IEEE 1149.1 JTAG-based in-system programming using standard 5 V V_CC. No external programming voltage or special hardware is required, and configuration data remains nonvolatile after power cycling - a core feature of the XC9500 family confirmed in Xilinx DS057 documentation.

What is the I/O voltage compatibility of the XC95108-10PQ160C?

The XC95108-10PQ160C operates exclusively at 5 V and features TTL-compatible input thresholds and output drive levels. Its I/O pins are not 3.3 V tolerant, and interfacing with lower-voltage logic requires external level-shifting circuitry per Xilinx Application Note XAPP058.

Can the XC95108-10PQ160C replace older PAL or GAL devices?

Yes, the XC95108-10PQ160C is widely used as a drop-in replacement for 22V10, 16V8, and GAL22V10 devices in legacy designs. Its pin-compatible emulation mode and ABEL/VHDL synthesis support allow direct migration without altering existing PCB layouts or timing constraints.

Is the XC95108-10PQ160C still in active production?

While Xilinx discontinued new production of the XC9500 family in 2018, the XC95108-10PQ160C remains available through authorized distributors and Aetrix Electronics' extended-life component program, with full traceability and guaranteed long-term supply for legacy industrial and medical applications.

XC95108-10PQ160C Specifications

Product attributes: Attribute value

Manufacturer:: AMD

Series:: XC9500

Package/Case:: 160-BQFP

Packaging:: Tray

Product Status:: Obsolete

Programmable:: Not Verified

Programmable Type:: In System Programmable (min 10K program/erase cycles)

Delay Time tpd(1) Max:: 10 ns

Voltage Supply - Internal:: 4.75V ~ 5.25V

Number of Logic Elements/Blocks:: 6

Number of Macrocells:: 108

Number of Gates:: 2400

Number of I/O:: 108

Operating Temperature:: 0°C ~ 70°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 160-PQFP (28x28)

XC95108-10PQ160C FAQ

1.How can I place an order for XC95108-10PQ160C through Aetrix?

Please submit a Request for Quotation (RFQ) for XC95108-10PQ160C on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for XC95108-10PQ160C reliable?

The price and inventory of XC95108-10PQ160C are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XC95108-10PQ160C is usually 5 days.

3.What payment methods are accepted for XC95108-10PQ160C?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XC95108-10PQ160C transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for XC95108-10PQ160C?

XC95108-10PQ160C orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your XC95108-10PQ160C order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for XC95108-10PQ160C?

For technical support, including XC95108-10PQ160C datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XC95108-10PQ160C requirements.

6.How does Aetrix verify that XC95108-10PQ160C is sourced from the original manufacturer or authorized distributors?

All XC95108-10PQ160C products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XC95108-10PQ160C meets industry standards.

7.What is the process for return or replacement of XC95108-10PQ160C?

All XC95108-10PQ160C units undergo pre-shipment inspection (PSI). If there is an issue with XC95108-10PQ160C, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The XC95108-10PQ160C part is unused and in its original packaging.

Return procedure for XC95108-10PQ160C:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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