AMD XC95108-20PQ160I

Overview

XC95108-20PQ160I from AMD (acquired by Xilinx) is a high-density Complex Programmable Logic Device (CPLD) with 108 macrocells, 5 ns pin-to-pin propagation delay, and 160-pin PQFP package. It implements synchronous logic in industrial control, legacy interface bridging, and power management sequencing.

For engineers reviewing the XC95108-20PQ160I datasheet, pinout, applications, or equivalent options, key selection factors include macrocell count, I/O pin availability, in-system programmability support, and 5 V tolerant operation for mixed-voltage system integration.

Technical Context

The XC95108-20PQ160I uses a fast zero-power CMOS architecture with three distinct function blocks, each containing 36 macrocells and supporting up to 90 product terms per macrocell. Its global clock, output enable, and set/reset controls are fully programmable across all function blocks.

It supports IEEE Std 1149.1 JTAG boundary-scan testing and in-system programming via the JTAG port. Configuration is stored in non-volatile EEPROM, enabling single-chip operation without external configuration memory.

Key Specifications

Pinout & Package

XC95108-20PQ160I is housed in a 160-pin Plastic Quad Flat Package (PQFP) with 28 × 28 mm body size, 0.65 mm lead pitch, and standard JEDEC MO-118 footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CPLD applications.

Compared with XC95108-20PQ160I, the XCR3128XL-10VQ100I offers higher density at lower power but mandates voltage translation, while the XC9572-15PC84I provides drop-in compatibility in 5 V systems at reduced capacity-making it a true functional subset rather than a performance upgrade.

Availability

XC95108-20PQ160I is available at Aetrix Electronics and suitable for industrial automation, legacy system maintenance, and FPGA companion logic applications requiring stable component supply and long-term obsolescence management.

Supply support for XC95108-20PQ160I includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

AMD acquired Xilinx in 2022, inheriting its legacy CPLD portfolio including the XC9500 family. Xilinx originally developed these devices for high-reliability, non-volatile programmable logic in industrial and telecom environments.

The XC9500 family-including XC95108-20PQ160I-was designed to replace TTL/SSI/MSI logic in systems demanding field-upgradable, pin-compatible, and power-efficient glue logic solutions.

FAQ

What is the operating voltage range for XC95108-20PQ160I?

The XC95108-20PQ160I operates at 5.0 V ± 10%, meaning its valid supply range is 4.5 V to 5.5 V. This specification ensures compatibility with standard 5 V TTL and CMOS logic families. All I/O pins are 5 V tolerant, and the internal EEPROM configuration memory retains data without power. The XC95108-20PQ160I does not support 3.3 V core operation.

Does XC95108-20PQ160I support in-system programming?

Yes, XC95108-20PQ160I supports IEEE 1149.1-compliant in-system programming (ISP) via its dedicated JTAG interface (TCK, TMS, TDI, TDO). No external programming hardware or socket is required-firmware updates and logic revisions can be performed directly on the target board. The XC95108-20PQ160I retains its configuration in on-chip EEPROM after power cycling.

How many I/O pins does XC95108-20PQ160I provide?

The XC95108-20PQ160I provides 132 user-programmable I/O pins within its 160-pin PQFP package. Pins are organized into two VCCIO banks (pins 1–8 and 153–160), allowing mixed-voltage interfacing. Each I/O pin supports configurable slew rate and Schmitt-trigger input hysteresis, and all are 5 V tolerant regardless of VCCIO setting.

What is the maximum clock frequency supported by XC95108-20PQ160I?

The XC95108-20PQ160I has a 5 ns pin-to-pin propagation delay, supporting reliable synchronous operation up to 20 MHz under typical conditions. Its four global clock inputs (GCK1–GCK4) are low-skew and fully programmable, enabling multi-clock domain designs. The actual maximum system frequency depends on logic depth and routing; the XC95108-20PQ160I is not rated for >25 MHz operation.

Is XC95108-20PQ160I still in production?

The XC95108-20PQ160I is discontinued by AMD/Xilinx but remains available through authorized distributors and Aetrix Electronics' extended lifecycle program. We maintain traceable inventory and offer obsolescence mitigation services-including cross-reference support and last-time-buy coordination-for customers relying on this device in legacy industrial and telecom systems.