AMD XC95144XL-7TQG144C
- Part No.:
- XC95144XL-7TQG144C
- Manufacturer:
- AMD
- Package:
- 144-LQFP
- Datasheet:
-
XC95144XL-7TQG144C.pdf
- Description:
- IC CPLD 144MC 7.5NS 144TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,694
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Product details
Overview
XC95144XL-7TQG144C from AMD (acquired by Xilinx) is a 144-macrocell CPLD in TQFP-144 package, with 7.5 ns pin-to-pin propagation delay, 3.3 V supply, and in-system programmable via JTAG. It serves as logic replacement and glue logic in industrial control I/O modules.
For engineers reviewing the XC95144XL-7TQG144C datasheet, pinout, applications, or equivalent options, key selection criteria include propagation delay, macrocell count, I/O voltage compatibility, JTAG programmability, and industrial temperature range support.
Technical Context
This device belongs to the XC9500XL family of high-performance, low-voltage CPLDs built on advanced CMOS technology. It integrates 144 macrocells across 8 function blocks, each with 18 inputs and configurable product-term-based logic.
The architecture supports in-system programming (ISP) via IEEE 1149.1 JTAG boundary-scan interface and features slew-rate controlled outputs, programmable power-down mode, and user-defined I/O standards including LVTTL and LVCMOS.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Macrocell Count | 144 macrocells provide combinational and registered logic capacity for medium-complexity glue logic functions. |
| Propagation Delay | 7.5 ns max ensures timing-critical path compliance in 10–25 MHz control logic designs. |
| Supply Voltage | 3.3 V ±0.3 V enables direct interfacing with modern microcontrollers and FPGAs without level-shifting. |
| I/O Pins | 117 user I/O pins support flexible board-level signal routing and peripheral interfacing. |
| Operating Temperature | 0°C to +70°C commercial grade suits indoor industrial automation and test equipment environments. |
| JTAG Support | IEEE 1149.1 compliant ISP allows field firmware updates and boundary-scan testing without socket removal. |
Pinout & Package
TQFP-144 (Thin Quad Flat Package, 20 mm × 20 mm, 0.5 mm pitch) with exposed thermal pad; RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCCIO | I/O Power Supply | Supplies 3.3 V to all I/O banks; decoupling required per bank for noise immunity. |
| GND | Ground Reference | Common return for core and I/O circuits; multiple pins ensure low-impedance grounding. |
| TCK, TMS, TDI, TDO | JTAG Interface | Enable in-system programming and boundary-scan testing without external programmers. |
| TDI, TDO | Serial Data Path | Support daisy-chained JTAG configuration for multi-device systems. |
| CLKIN | Global Clock Input | Drives internal global clock network for synchronous logic timing across all macrocells. |
Key Features
| Feature | Design Value |
|---|---|
| In-System Programmability | Enables field reconfiguration and firmware updates via standard JTAG interface without device removal. |
| Slew-Rate Controlled Outputs | Reduces EMI and signal integrity issues in dense PCB layouts with fast edge rates. |
| Programmable Power-Down Mode | Lowers static current to <10 µA during idle periods, extending battery life in portable test gear. |
| Multi-Voltage I/O Support | Configurable for LVTTL/LVCMOS levels ensures interoperability with mixed-voltage peripherals. |
Applications
| Industrial PLC I/O Expansion | Legacy System Interface Bridge |
|---|---|
Use Scenario: Adding digital input/output capability to programmable logic controller backplanes. IC Role / Device Role / Timing Role: Glue logic translator between CPU bus and opto-isolated I/O modules. Use Value: Replaces discrete TTL logic with single-chip solution, reducing BOM count and layout area. | Use Scenario: Interfacing RS-232/RS-485 transceivers with modern 3.3 V microcontrollers. IC Role / Device Role / Timing Role: Level-shifting and protocol timing adapter for legacy serial communication. Use Value: Eliminates need for external level shifters and timing discretes while maintaining signal integrity. |
| Automated Test Equipment (ATE) Control Logic | Medical Device Signal Conditioning |
Use Scenario: Sequencing relay drivers and sensor multiplexers in benchtop test fixtures. IC Role / Device Role / Timing Role: Synchronous state machine controlling stimulus/response timing windows. Use Value: 7.5 ns delay enables sub-100 ns timing resolution for precision test sequencing. | Use Scenario: Managing analog switch arrays and ADC/DAC enable signals in patient monitoring units. IC Role / Device Role / Timing Role: Digital control hub coordinating sampling clocks and data-path gating. Use Value: Low-power programmable mode supports battery-backed operation during standby states. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CPLD-based logic replacement applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| XCR3128XL-7TQ144C | 128 macrocells, identical TQFP-144 package and 7.5 ns speed grade. | Slightly lower logic density; suitable where design fits within 128 macrocells. | Select when logic utilization is ≤89% to allow margin for future updates. |
| XC95216-10TQ144C | 216 macrocells, 10 ns propagation delay, 5 V tolerant I/O, non-ISP. | Higher density but slower timing and no in-system programming support. | Choose only if legacy 5 V system integration or higher macrocell count is mandatory. |
Compared with XC95144XL-7TQG144C, XCR3128XL-7TQ144C offers near-identical footprint and timing with reduced capacity, while XC95216-10TQ144C trades ISP and speed for greater logic resources and 5 V compatibility-neither is pin-compatible, requiring PCB revision for substitution.
Availability
XC95144XL-7TQG144C is available at Aetrix Electronics and suitable for industrial control, automated test equipment, and medical device manufacturing requiring stable component supply and long-term sourcing continuity.
Supply support for XC95144XL-7TQG144C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
AMD acquired Xilinx in 2022; this device was originally developed by Xilinx as part of its mature CPLD portfolio.
The XC9500XL family targets cost-sensitive, low-power, medium-density logic replacement in industrial and instrumentation applications where programmability and reliability are critical.
FAQ
What is the maximum operating frequency supported by XC95144XL-7TQG144C?
The XC95144XL-7TQG144C has a 7.5 ns pin-to-pin propagation delay, enabling reliable operation up to approximately 133 MHz for register-to-register paths under typical conditions. Actual system frequency depends on logic depth and routing; the device datasheet specifies 125 MHz maximum clock input frequency for the global clock pin CLKIN. XC95144XL-7TQG144C does not guarantee 133 MHz across all internal paths due to combinatorial delays.
Does XC95144XL-7TQG144C support in-system programming (ISP)?
Yes, XC95144XL-7TQG144C supports IEEE 1149.1 JTAG-based in-system programming, allowing configuration and reprogramming while soldered on the target board. This eliminates the need for socketed programming and enables field firmware updates. XC95144XL-7TQG144C requires no external programming hardware beyond a standard JTAG cable and compatible software such as Xilinx ISE.
What is the I/O voltage tolerance of XC95144XL-7TQG144C?
XC95144XL-7TQG144C operates exclusively at 3.3 V VCCIO and is not 5 V tolerant. Its I/Os are designed for LVTTL and LVCMOS 3.3 V signaling standards. Driving XC95144XL-7TQG144C inputs with 5 V signals may cause damage or unreliable operation unless level-shifting circuitry is used.
Can XC95144XL-7TQG144C be used in automotive applications?
No, XC95144XL-7TQG144C is rated for 0°C to +70°C commercial temperature range and lacks AEC-Q100 qualification. It is not recommended for under-hood or safety-critical automotive systems. XC95144XL-7TQG144C is intended for industrial, medical, and test equipment where ambient temperatures remain within its specified operating range.
Is there a drop-in replacement for XC95144XL-7TQG144C with higher macrocell count?
No pin-compatible higher-density replacement exists in the XC9500XL family. The XC95216-10TQ144C offers 216 macrocells but uses different timing characteristics and lacks in-system programmability. Substituting it for XC95144XL-7TQG144C requires PCB redesign, timing validation, and toolchain updates. XC95144XL-7TQG144C remains the highest-density ISP-capable option in its exact speed/package class.
XC95144XL-7TQG144C Specifications
- Product attributes
- Attribute value
- Manufacturer:
- AMD
- Series:
- XC9500XL
- Package/Case:
- 144-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Programmable Type:
- In System Programmable (min 10K program/erase cycles)
- Delay Time tpd(1) Max:
- 7.5 ns
- Voltage Supply - Internal:
- 3V ~ 3.6V
- Number of Logic Elements/Blocks:
- 8
- Number of Macrocells:
- 144
- Number of Gates:
- 3200
- Number of I/O:
- 117
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 144-TQFP (20x20)
XC95144XL-7TQG144C FAQ
1.How can I place an order for XC95144XL-7TQG144C through Aetrix?
Please submit a Request for Quotation (RFQ) for XC95144XL-7TQG144C on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XC95144XL-7TQG144C reliable?
The price and inventory of XC95144XL-7TQG144C are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XC95144XL-7TQG144C is usually 5 days.
3.What payment methods are accepted for XC95144XL-7TQG144C?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XC95144XL-7TQG144C transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XC95144XL-7TQG144C?
XC95144XL-7TQG144C orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XC95144XL-7TQG144C order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XC95144XL-7TQG144C?
For technical support, including XC95144XL-7TQG144C datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XC95144XL-7TQG144C requirements.
6.How does Aetrix verify that XC95144XL-7TQG144C is sourced from the original manufacturer or authorized distributors?
All XC95144XL-7TQG144C products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XC95144XL-7TQG144C meets industry standards.
7.What is the process for return or replacement of XC95144XL-7TQG144C?
All XC95144XL-7TQG144C units undergo pre-shipment inspection (PSI). If there is an issue with XC95144XL-7TQG144C, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XC95144XL-7TQG144C part is unused and in its original packaging.
Return procedure for XC95144XL-7TQG144C:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
XC95144XL-7TQG144C Tags

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5M40ZE64C5N
Intel

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ATF1502ASV-15AU44
Microchip Technology

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5M80ZE64C5N
Intel

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5M80ZT100C5N
Intel

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ATF1502AS-10AU44
Microchip Technology

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ATF1502AS-10JU44
Microchip Technology

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5M80ZE64I5N
Intel

-
5M80ZT100I5N
Intel
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LC4032V-75TN48C
Lattice Semiconductor Corporation

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ATF1504ASV-15AU44
Microchip Technology

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ATF1504AS-10JU44
Microchip Technology

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5M160ZE64C5N
Intel
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