AMD XC95288XL-10TQG144C
- Part No.:
- XC95288XL-10TQG144C
- Manufacturer:
- AMD
- Package:
- 144-LQFP
- Datasheet:
-
XC95288XL-10TQG144C.pdf
- Description:
- IC CPLD 288MC 10NS 144TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,422
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Product details
Overview
XC95288XL-10TQG144C from AMD (acquired Xilinx CPLD business) is a 288-macrocell in-system programmable Complex Programmable Logic Device (CPLD) in 144-pin TQFP package, with 10 ns maximum pin-to-pin delay, 5 V tolerant I/Os, and support for IEEE 1149.1 JTAG boundary-scan testing. It is used in legacy industrial control logic replacement and FPGA configuration glue logic.
For engineers reviewing the XC95288XL-10TQG144C datasheet, pinout, applications, or equivalent options, key selection factors include propagation delay, macrocell count, I/O voltage tolerance, JTAG compliance, and legacy design migration path from older XC9500 family devices.
Technical Context
The XC95288XL-10TQG144C implements a multi-array architecture with four function blocks, each containing 72 macrocells with product-term sharing and expandable OR gates. It uses EEPROM-based non-volatile configuration storage, enabling instant-on operation without external configuration PROM.
Logic is programmed via IEEE 1149.1-compliant JTAG interface or parallel programming mode. All I/O pins support 5 V TTL/CMOS levels and are configurable as inputs, outputs, or bidirectional with slew-rate control and Schmitt-trigger inputs on selected pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Macrocell Count | 288 macrocells distributed across four function blocks; enables medium-complexity synchronous/asynchronous logic implementation. |
| Max Propagation Delay | 10 ns pin-to-pin; supports 100 MHz system clock domains in combinatorial paths. |
| I/O Voltage Tolerance | 5 V tolerant inputs and outputs; interoperable with legacy 5 V TTL/CMOS systems without level shifters. |
| Configuration Memory | EEPROM-based non-volatile storage; retains logic configuration after power cycle; no boot-up delay. |
| JTAG Support | Fully compliant with IEEE 1149.1; enables boundary-scan testing, in-system programming, and device verification. |
| Operating Voltage | 3.3 V core supply with 5 V tolerant I/Os; allows mixed-voltage board integration. |
Pinout & Package
144-pin Thin Quad Flat Pack (TQFP), 20 × 20 mm body, 0.5 mm pitch, lead-free (RoHS-compliant), thermally enhanced with exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TDI, TDO, TMS, TCK | JTAG Test Access Port | Enable IEEE 1149.1 boundary-scan testing and in-system programming without dedicated programming hardware. |
| GCK0–GCK3 | Global Clock Inputs | Four dedicated low-skew clock inputs per function block; support synchronous logic timing control. |
| OE0–OE3 | Output Enable Inputs | Per-function-block output enable control; allows dynamic I/O direction management in real time. |
| I/O0–I/O119 | Configurable I/O Pins | 120 user-programmable I/Os; each supports input, output, or bidirectional mode with slew-rate control. |
| VCCINT, VCCIO | Power Supply Pins | VCCINT = 3.3 V core supply; VCCIO = 5 V I/O supply; decoupling required per AMD XC95XL layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| In-System Programmability (ISP) | Enables field firmware updates and logic revisions via JTAG without socket removal or UV erasure. |
| 5 V Tolerant I/Os | Eliminates need for external level translators when interfacing with legacy 5 V peripherals or microcontrollers. |
| IEEE 1149.1 Boundary-Scan | Supports PCB-level interconnect testing and fault isolation during manufacturing and maintenance. |
| Fast Zero-Power Operation | Typical standby current < 10 µA at 25°C; suitable for low-power industrial standby modes. |
| Programmable Slew Rate | Reduces EMI and signal integrity issues by limiting edge rates on high-speed I/O transitions. |
Applications
| Industrial Control Logic | Legacy System Glue Logic |
|---|---|
Use Scenario: Replacing discrete TTL logic and PALs in motor drive controllers and PLC I/O modules. IC Role / Device Role / Timing Role: CPLD implementing state machines, address decoding, and bus arbitration for 8-bit/16-bit microcontrollers. Use Value: Reduces component count by >70% versus discrete logic while maintaining deterministic 10 ns timing behavior. | Use Scenario: Interfacing between legacy FPGAs (e.g., XC4000 series) and modern microprocessors in test equipment backplanes. IC Role / Device Role / Timing Role: Protocol translation and timing alignment layer between mismatched clock domains and voltage standards. Use Value: 5 V tolerant I/Os and 3.3 V core allow seamless bridging without level-shifting components. |
| FPGA Configuration Manager | Embedded Bootloader Sequencer |
Use Scenario: Storing and loading bitstreams into Spartan or Virtex FPGAs during power-up sequences. IC Role / Device Role / Timing Role: Non-volatile configuration controller managing FPGA INIT_B, PROGRAM_B, and DONE signals with precise timing. Use Value: EEPROM retention ensures reliable reconfiguration across power cycles without external PROM. | Use Scenario: Managing multi-stage boot sequence for ARM7-based industrial controllers with external flash and SRAM initialization. IC Role / Device Role / Timing Role: Synchronous sequencer generating timed reset, chip-select, and strobe signals for memory and peripheral initialization. Use Value: Deterministic 10 ns propagation enables sub-100 ns timing margins critical for DDR SDRAM setup. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CPLD-based logic replacement applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| XCR3256XL-10TQ144C | 256 macrocells, same 10 ns speed grade and TQFP-144 package; lower macrocell density but identical pinout and voltage specs. | Suitable for designs requiring reduced logic capacity but identical footprint and timing. | Select when logic utilization is ≤90% of 256 macrocells to reduce cost without redesign. |
| XC95288XL-7TQG144C | Same 288 macrocells and package, but 7 ns propagation delay (higher speed grade); requires tighter timing closure. | Better suited for 125 MHz+ clock domains where 10 ns delay is insufficient. | Choose only if design requires sub-10 ns path timing; otherwise, XC95288XL-10TQG144C offers optimal cost/performance balance. |
Compared with XCR3256XL-10TQ144C and XC95288XL-7TQG144C, the XC95288XL-10TQG144C delivers full 288-macrocell capacity at 10 ns speed in a mature, widely supported footprint-making it the preferred choice for stable, cost-sensitive industrial logic upgrades where timing margin exceeds 10 ns.
Availability
XC95288XL-10TQG144C is available at Aetrix Electronics and suitable for industrial control logic replacement, FPGA configuration management, and legacy system glue logic requiring stable component supply and long-term lifecycle support.
Supply support for XC95288XL-10TQG144C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
AMD acquired Xilinx in 2022 and now owns the XC95XL CPLD product line, originally developed for high-reliability, in-system programmable logic in industrial and aerospace applications.
The XC95XL family was designed specifically for legacy logic replacement and system-level glue logic in environments demanding EEPROM-based non-volatility, 5 V I/O compatibility, and JTAG testability-without migrating to FPGA-based solutions.
FAQ
What is the maximum operating frequency supported by XC95288XL-10TQG144C?
The XC95288XL-10TQG144C has a maximum pin-to-pin propagation delay of 10 ns, supporting system clock frequencies up to 100 MHz in typical combinatorial paths. Actual achievable frequency depends on logic depth and routing; timing analysis must be performed using Xilinx WebPACK or ISE software targeting the XC95XL architecture. The XC95288XL-10TQG144C does not specify a guaranteed maximum system clock frequency independent of design implementation.
Does XC95288XL-10TQG144C require an external configuration PROM?
No. The XC95288XL-10TQG144C contains on-chip EEPROM configuration memory, enabling instant-on operation after power-up without external PROM or configuration controllers. This eliminates boot-time delays and reduces BOM count. The XC95288XL-10TQG144C retains its programmed logic indefinitely under normal operating conditions and temperature ranges.
Can XC95288XL-10TQG144C interface directly with 5 V TTL devices?
Yes. All I/O pins of the XC95288XL-10TQG144C are 5 V tolerant, meaning they accept 5 V input signals and drive 5 V logic levels while powered by a 3.3 V core supply. This allows direct connection to legacy 5 V TTL, CMOS, and microcontroller peripherals without level-shifting circuitry. The XC95288XL-10TQG144C maintains full functionality under these conditions.
Is XC95288XL-10TQG144C still in active production?
XC95288XL-10TQG144C is currently available through authorized distributors and Aetrix Electronics as a mature, long-lifecycle product. While AMD no longer develops new XC95XL variants, the part remains in production with committed supply for industrial customers. Lifecycle status for XC95288XL-10TQG144C is monitored quarterly and communicated proactively to qualified OEMs.
What programming tools are compatible with XC95288XL-10TQG144C?
The XC95288XL-10TQG144C is supported by Xilinx WebPACK ISE 14.7 and earlier versions, including the free WebPACK edition. Programming is performed via IEEE 1149.1 JTAG interface using standard cables (e.g., Xilinx DLC10, Digilent HS2). The XC95288XL-10TQG144C does not support Vivado or newer toolchains; legacy ISE remains the official and fully validated environment.
XC95288XL-10TQG144C Specifications
- Product attributes
- Attribute value
- Manufacturer:
- AMD
- Series:
- XC9500XL
- Package/Case:
- 144-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Programmable Type:
- In System Programmable (min 10K program/erase cycles)
- Delay Time tpd(1) Max:
- 10 ns
- Voltage Supply - Internal:
- 3V ~ 3.6V
- Number of Logic Elements/Blocks:
- 16
- Number of Macrocells:
- 288
- Number of Gates:
- 6400
- Number of I/O:
- 117
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 144-TQFP (20x20)
XC95288XL-10TQG144C FAQ
1.How can I place an order for XC95288XL-10TQG144C through Aetrix?
Please submit a Request for Quotation (RFQ) for XC95288XL-10TQG144C on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XC95288XL-10TQG144C reliable?
The price and inventory of XC95288XL-10TQG144C are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XC95288XL-10TQG144C is usually 5 days.
3.What payment methods are accepted for XC95288XL-10TQG144C?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XC95288XL-10TQG144C transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XC95288XL-10TQG144C?
XC95288XL-10TQG144C orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XC95288XL-10TQG144C order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XC95288XL-10TQG144C?
For technical support, including XC95288XL-10TQG144C datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XC95288XL-10TQG144C requirements.
6.How does Aetrix verify that XC95288XL-10TQG144C is sourced from the original manufacturer or authorized distributors?
All XC95288XL-10TQG144C products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XC95288XL-10TQG144C meets industry standards.
7.What is the process for return or replacement of XC95288XL-10TQG144C?
All XC95288XL-10TQG144C units undergo pre-shipment inspection (PSI). If there is an issue with XC95288XL-10TQG144C, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XC95288XL-10TQG144C part is unused and in its original packaging.
Return procedure for XC95288XL-10TQG144C:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
XC95288XL-10TQG144C Tags

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5M40ZE64C5N
Intel

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ATF1502ASV-15AU44
Microchip Technology

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5M80ZE64C5N
Intel

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5M80ZT100C5N
Intel

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ATF1502AS-10AU44
Microchip Technology

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ATF1502AS-10JU44
Microchip Technology

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5M80ZE64I5N
Intel

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5M80ZT100I5N
Intel
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LC4032V-75TN48C
Lattice Semiconductor Corporation

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ATF1504ASV-15AU44
Microchip Technology

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ATF1504AS-10JU44
Microchip Technology

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5M160ZE64C5N
Intel
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