Infineon Technologies XDPS21081XUMA1

Overview

XDPS21081 from Infineon Technologies is a digital AC/DC current-mode PWM controller for forced quasi-resonant zero-voltage-switching (FQR ZVS) flyback converters, featuring integrated 600 V HV startup cell, multi-mode operation (QR/FQR ZVS/burst), adaptive current limitation, and one-pin UART configuration via GPIO. It targets high-density USB PD and fast-charging adapters operating across 85–264 VAC input with <30 mW no-load power.

For engineers reviewing the XDPS21081 datasheet, XDPS21081 pinout, XDPS21081 application, or XDPS21081 equivalent, key selection criteria include ZVS timing control per output voltage, HV bulk sensing capability, GD0/GD1 dual gate drive logic, brown-in/out thresholds, and OTP-configurable parameters for system-specific tuning.

Technical Context

The XDPS21081 implements a digitally controlled current-mode architecture with an ASSP engine executing real-time FQR ZVS timing algorithms based on reflected voltage (ZCD), bulk voltage (HV), and primary-side current (CS). It supports line-dependent mode transitions: low-line QR and high-line FQR ZVS, with programmable ZVS enable threshold and ringing suppression time.

Its protection suite includes dual-level OCP (OCP1 cycle-by-cycle, OCP2 spike-blanked), VCC UVLO (9.1 V brown-in, 7.2 V shutdown), internal OTP (130 °C), and primary-side VoutOVP (2.75 V at ZCD). The integrated HV startup cell delivers 1.15 mA turn-on and 0.443 mA turn-off current for direct bus monitoring without auxiliary winding.

Key Specifications

Pinout & Package

XDPS21081 is housed in a PG-DSO-12 (exposed pad) package with creepage-optimized pin layout for high-voltage isolation. Thermal pad enhances power dissipation in compact adapter designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital FQR ZVS flyback controller applications.

Compared with UCC28780 and ICE5QSAG, XDPS21081 uniquely integrates HV startup, OTP-based ZVS tuning, and one-pin UART - enabling higher power density, lower no-load power, and field-programmable behavior without hardware changes.

Availability

XDPS21081 is available at Aetrix Electronics and suitable for USB PD 3.0 adapters, fast-charging wall adapters, and industrial AC/DC power modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for XDPS21081 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in high-voltage analog and digital power controllers.

XDPS21081 belongs to Infineon's XDPS digital AC/DC controller product line, designed specifically for high-density, low-noise, optocoupler-free flyback converters targeting USB PD, fast charging, and industrial power supplies.

FAQ

What is the function of the GD1 pin on XDPS21081?

GD1 is a dedicated FQR ZVS gate pulse output that initiates resonant valley switching by triggering the external MOSFET's gate driver at precisely calculated timing points. It operates in conjunction with GD0 and is dynamically adjusted based on ZCD-sensed reflected voltage and line voltage - enabling ZVS across varying output loads without external timing circuitry.

How does the HV pin enable brown-in and brown-out detection?

The HV pin connects directly to the rectified bulk voltage and feeds an internal 600 V startup cell that provides 1.15 mA turn-on current (brown-in at 9.1 V VCC) and 0.443 mA turn-off current (brown-out at 7.2 V VCC). This eliminates need for external resistive dividers and enables accurate, temperature-stable line monitoring without auxiliary winding dependency.

Can XDPS21081 operate without an optocoupler?

Yes - XDPS21081 supports primary-side regulation using ZCD pin for reflected voltage sensing and adaptive Vcs offset calculation, enabling optocoupler-free designs. MFIO remains optional for enhanced regulation accuracy or burst mode control, but is not required for basic closed-loop operation.

What configuration parameters can be programmed via the GPIO UART interface?

The GPIO pin supports one-pin UART programming of OTP-stored parameters including ZVS enable line voltage threshold, burst mode entry/exit levels, soft-start duration, OCP1/OCP2 thresholds, VoutOVP level, and ringing suppression time - all configurable using Infineon's .dp Vision software before final assembly.