Texas Instruments XF28M36P63C2ZWTT

Overview

XF28M36P63C2ZWTT from Texas Instruments is a dual-core Concerto™ microcontroller integrating an Arm® Cortex®-M3 (125 MHz) and a TMS320C28x real-time control CPU (150 MHz), with 1 MB ECC flash, 128 KB RAM (ECC/parity), dual 12-bit ADCs (2.88 MSPS), 12 ePWM modules, and 10/100 ENET 1588 MII - deployed in industrial AC-DC power supplies and servo drive control modules.

For engineers reviewing the XF28M36P63C2ZWTT datasheet, XF28M36P63C2ZWTT pinout, XF28M36P63C2ZWTT application, or XF28M36P63C2ZWTT equivalent, key selection considerations include dual-core clock coordination (125 MHz M3 / 150 MHz C28x), integrated safety features (ECC, dual security zones, NMI watchdogs), and shared analog subsystem timing constraints for high-precision motor control loop closure.

Technical Context

The XF28M36P63C2ZWTT implements tightly coupled interprocessor communication via 32-channel IPC with 2 KB message RAM per subsystem, enabling deterministic data exchange between the Cortex-M3 communications stack and C28x real-time control firmware. Its dual ADC subsystem supports simultaneous sampling across 24 channels with 347 ns conversion time and six comparator/DAC units for fast overcurrent trip response.

Clocking uses independent PLLs for each core with dynamic ratio changes supported; the M3 and C28x must operate at compatible frequencies (e.g., 125 MHz M3 + 125 MHz C28x, or 75 MHz M3 + 150 MHz C28x). Shared resources-including 64 KB parity-protected RAM, EPI, µCRC, and analog interface bus-are arbitrated with priority-based access to prevent contention during concurrent high-bandwidth operations.

Key Specifications

Pinout & Package

XF28M36P63C2ZWTT is housed in a 289-ball New Fine Pitch Ball Grid Array (nFBGA, ZWT package) with 16.0 mm × 16.0 mm body size and 0.8 mm ball pitch. The package supports thermal dissipation requirements for continuous operation at 105°C junction temperature in industrial motor control applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core real-time control applications.

Compared with F28M36P53C2ZWTT, XF28M36P63C2ZWTT adds ENET 1588 and USB OTG for synchronized distributed control and field firmware updates; versus TMS320F28388D, it trades EtherCAT for Arm-based protocol stacks (Modbus TCP, HTTP) but requires different PCB layout and toolchain integration.

Availability

XF28M36P63C2ZWTT is available at Aetrix Electronics and suitable for AC drive control modules, servo drive control modules, central inverters, and string inverters requiring stable component supply across extended industrial product lifecycles.

Supply support for XF28M36P63C2ZWTT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in industrial, automotive, and power management solutions.

The XF28M36P63C2ZWTT belongs to TI's Concerto™ family - designed to unify high-performance real-time control (C28x) and rich connectivity (Arm Cortex-M3) in a single chip for industrial power conversion and motion control systems.

FAQ

What is the maximum operating frequency of each core in XF28M36P63C2ZWTT?

The XF28M36P63C2ZWTT features an Arm Cortex-M3 core rated at 125 MHz and a TMS320C28x core rated at 150 MHz. However, due to shared clocking constraints, valid combinations include 125 MHz M3 + 125 MHz C28x or 75 MHz M3 + 150 MHz C28x. The XF28M36P63C2ZWTT datasheet specifies these coordinated speed pairs in Table 3-2 to ensure stable inter-subsystem timing and memory arbitration.

Does XF28M36P63C2ZWTT support IEEE 1588 Precision Time Protocol?

Yes, XF28M36P63C2ZWTT integrates a 10/100 ENET 1588 MII interface with hardware timestamping capability, enabling full IEEE 1588-2008 PTP slave and master operation. This allows sub-microsecond clock synchronization across distributed motor drives or solar inverters - a key requirement for coordinated multi-axis motion or grid-synchronized renewable energy systems using XF28M36P63C2ZWTT.

How many ADC channels does XF28M36P63C2ZWTT support, and what is their sampling capability?

XF28M36P63C2ZWTT includes two independent 12-bit ADC modules, each with 12 input channels (24 total), 2 sample-and-hold circuits, and up to 2.88 MSPS aggregate sampling rate. Each ADC achieves 347 ns conversion time, and both can be triggered simultaneously for synchronized acquisition - essential for three-phase current sensing in inverter applications using XF28M36P63C2ZWTT.

What safety features are implemented in XF28M36P63C2ZWTT for industrial certification?

XF28M36P63C2ZWTT includes ECC on flash and RAM, parity protection on RAM, dual security zones (128-bit password per zone), NMI watchdogs for both subsystems, and critical register/I/O lock protection. These features directly support functional safety requirements for IEC 61508 SIL-2 and ISO 13849 PL d architectures - documented in TI's Concerto safety manual referenced for XF28M36P63C2ZWTT design-in.

Is XF28M36P63C2ZWTT pin-compatible with other F28M36x devices?

Yes, XF28M36P63C2ZWTT shares the same 289-ball ZWT nFBGA package and identical pinout with F28M36P53C2ZWTT, F28M36H53B2ZWTT, and F28M36H33B2ZWTT. This allows direct PCB reuse across variants - for example, upgrading from F28M36P53C2ZWTT to XF28M36P63C2ZWTT requires only firmware and configuration changes, not board redesign, preserving layout investment in XF28M36P63C2ZWTT-based platforms.