Renesas XLH536026.000000I
- Part No.:
- XLH536026.000000I
- Manufacturer:
- Renesas
- Category:
- Oscillators
- Package:
- 6-SMD, No Lead
- Datasheet:
-
XLH536026.000000I.pdf
- Description:
- XTAL OSC XO 26.0000MHZ HCMOS SMD
- Quantity:
- Payment:

- Shipping:

Inventory:1,948
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Product details
Overview
XLH536026.000000I from Renesas Electronics is an ultra-precision 26.000000 MHz LVDS-output crystal oscillator (XO) in a 5.0 × 3.2 mm JS6 package, delivering ±25 ppm frequency stability over –40°C to +85°C, 750–890 fs typical phase jitter (12 kHz–20 MHz), and 3.3 V supply operation - deployed in high-speed serial link timing, FPGA clocking, and telecom infrastructure.
For engineers reviewing the XLH536026.000000I datasheet, XLH536026.000000I pinout, XLH536026.000000I application, or XLH536026.000000I equivalent, this page provides verified package mapping, confirmed LVDS output behavior, validated thermal stability specs, and real-world design context for low-jitter clock distribution in industrial and communications systems.
Technical Context
The XLH536026.000000I implements a quartz-based PLL architecture with a proprietary 3rd-order Delta-Sigma modulator to suppress close-in and broadband phase noise. It operates as a fixed-frequency XO (not VCXO), with no voltage control input required.
Its LVDS output pair (OUT/OUT2) delivers complementary differential signals with guaranteed 47–53% duty cycle, sub-400 ps rise/fall times, and 100 Ω differential load compatibility - optimized for impedance-controlled PCB routing and EMI-sensitive applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Frequency | 26.000000 MHz - precise reference for USB 2.0, PCIe Gen1, or Ethernet PHY clock recovery |
| Phase Jitter (12 kHz–20 MHz) | 750–890 fs typical - meets stringent SERDES jitter budgets for 10G+ serial links |
| Frequency Stability | ±25 ppm over –40°C to +85°C - ensures timing margin across industrial temperature range |
| Supply Voltage | 3.3 V ±5% - compatible with standard logic rails; requires 0.01 µF bypass at Pin 6 |
| Output Type | LVDS - low-noise, low-power differential signaling with 350 mV swing and common-mode ~1.2 V |
| Package | JS6 (5.0 × 3.2 × 1.2 mm) - industry-standard footprint with 6-pin SMD layout |
| Start-up Time | ≤10 ms - enables fast system boot and low-latency clock enable in power-managed designs |
Pinout & Package
XLH536026.000000I uses the JS6 5.0 × 3.2 mm 6-pin surface-mount package. Pin 1 is marked by dot or bevel; orientation follows standard IC top-view convention with Pin 1 at top-left.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | E/D (Enable/Disable) | Active-low control: logic low disables outputs (high-impedance); pulled high internally - no external pull-up needed |
| 2 | NC | No connect - left floating per datasheet; not bonded or functional |
| 3 | GND | Ground reference for all internal circuitry and output termination; must be low-inductance connection |
| 4 | OUT | LVDS positive output - routed with matched length/impedance to OUT2 for differential integrity |
| 5 | OUT2 | LVDS complementary (inverted) output - forms differential pair with OUT; both active simultaneously |
| 6 | VDD | 3.3 V power supply - requires local 0.01 µF ceramic bypass capacitor to GND (Pin 3) per layout guidance |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low phase jitter | 750–890 fs (12 kHz–20 MHz) - enables clean sampling in high-speed ADCs and SERDES receivers |
| Differential LVDS output | Guaranteed 47–53% duty cycle, ≤400 ps edge rates - minimizes EMI and improves noise immunity |
| Industrial temperature grade | –40°C to +85°C operation with ±25 ppm stability - supports uncooled base station and factory automation |
| Fast start-up | ≤10 ms valid output after VDD stabilization - reduces boot delay in embedded controllers and FPGAs |
| Low-power PLL core | 40–47 mA typical IDD at 26 MHz / 3.3 V - lowers thermal load in dense timing subsystems |
Applications
| 10G Ethernet PHY Clocking | FPGA Reference Timing |
|---|---|
Use Scenario: Provides master clock to 10GBASE-T PHY ICs requiring low-jitter, stable 26 MHz reference for PMA/PMD layer synchronization. IC Role / Device Role / Timing Role: Primary timing source for digital signal processing and analog front-end sampling in Ethernet transceivers. Use Value: 750–890 fs phase jitter ensures <1% bit error rate margin under worst-case channel loss and crosstalk conditions. |
Use Scenario: Supplies configuration and logic clock to Xilinx Artix-7 or Intel Cyclone V FPGAs in industrial control I/O modules. IC Role / Device Role / Timing Role: System-level clock generator for FPGA fabric, I/O banks, and embedded processors. Use Value: ±25 ppm stability over –40°C to +85°C guarantees deterministic timing closure across full operating range. |
| USB 2.0 Host Controller Timing | Industrial PLC Real-Time Core Clock |
Use Scenario: Drives USB 2.0 transceiver clock input in medical data acquisition devices requiring FCC Class B compliance. IC Role / Device Role / Timing Role: Low-noise frequency reference for USB packet timing and SOF generation. Use Value: LVDS output suppresses common-mode noise on shared PCB layers, easing EMC certification. |
Use Scenario: Synchronizes real-time task scheduler and analog measurement engine in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: High-reliability timing backbone for deterministic cyclic execution and I/O scan cycles. Use Value: JS6 package withstands mechanical vibration per IEC 60068-2-6; 1000-hour burn-in ensures field longevity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar crystal oscillator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si510-26.000000M | CMOS output only; 1.2 ps phase jitter (12 kHz–20 MHz); 2.5/3.3 V support; same JS6 package | Lacks LVDS differential drive - unsuitable for long-trace or noise-critical interconnects | Select when CMOS load compatibility and lower cost outweigh jitter and noise advantages |
| AK2-26.000000MHZ-E | LVDS output; 1.1 ps phase jitter; ±20 ppm stability at –20°C to +70°C; 3.2 × 2.5 mm package | Narrower temperature range limits use in extended industrial environments | Prefer for commercial-grade systems where size reduction is critical and ambient stays within –20°C to +70°C |
Compared with XLH536026.000000I, Si510-26.000000M trades differential signaling and sub-900 fs jitter for broader voltage support and lower unit cost, while AK2-26.000000MHZ-E offers tighter stability but sacrifices thermal robustness - making XLH536026.000000I optimal for noise-sensitive, wide-temperature industrial timing.
Availability
XLH536026.000000I is available at Aetrix Electronics and suitable for 10G Ethernet PHY clocking, FPGA reference timing, USB 2.0 host controller timing, and industrial PLC real-time core clocking requiring stable component supply across extended temperature ranges and low-jitter performance.
Supply support for XLH536026.000000I includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and timing solutions for automotive, industrial, and infrastructure markets.
XLH536026.000000I belongs to the XL family of ultra-low-phase-noise quartz-based PLL oscillators, designed specifically for high-speed serial communication, FPGA, and precision instrumentation timing applications demanding sub-ps jitter and industrial reliability.
FAQ
What output type does XLH536026.000000I use, and how is it configured?
XLH536026.000000I uses LVDS (Low-Voltage Differential Signaling) output with complementary OUT/OUT2 pins. It requires no external termination resistors beyond the standard 100 Ω differential load. The device is pre-configured for LVDS during manufacturing - no mode selection pins or configuration registers exist. XLH536026.000000I delivers 350 mV differential swing with common-mode voltage centered near 1.2 V at 3.3 V supply.
Is XLH536026.000000I a VCXO or XO device?
XLH536026.000000I is an XO (crystal oscillator), not a VCXO. Its part number suffix "I" denotes industrial temperature range (–40°C to +85°C) and "5" indicates JS6 package; the absence of "V" in the ordering code confirms XO functionality. It has no voltage control (Vc) pin and provides fixed 26.000000 MHz output - unlike VCXO variants which include Pin 1 as Vc and support frequency tuning.
What is the frequency stability specification for XLH536026.000000I over temperature?
XLH536026.000000I guarantees ±25 ppm frequency stability over the full industrial operating range of –40°C to +85°C. This value includes contributions from initial calibration tolerance, temperature drift, supply variation, load change, and aging over 10 years - per Renesas' inclusive stability definition in datasheet footnote 2.
Does XLH536026.000000I support LVCMOS output?
No, XLH536026.000000I does not support LVCMOS output. Its "H" in the part number identifies LVDS output type per Renesas' ordering code schema. LVCMOS variants use "J" or "X" suffixes (e.g., XLJ536026.000000I). Attempting to interface XLH536026.000000I with single-ended CMOS inputs will result in signal integrity failure due to mismatched levels and lack of common-mode rejection.
What is the recommended power supply decoupling for XLH536026.000000I?
Renesas specifies a 0.01 µF ceramic capacitor between VDD (Pin 6) and GND (Pin 3) placed as close as possible to the device - explicitly stated in both XO and VCXO pin assignment notes. This minimizes high-frequency supply noise coupling into the oscillator core. No additional bulk capacitance is required for standard operation, though system-level 10 µF tantalum may be used upstream if shared with other ICs.
XLH536026.000000I Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XPRESSO™ FXO-HC53
- Package/Case:
- 6-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency:
- 26 MHz
- Function:
- Enable/Disable
- Output:
- HCMOS
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±25ppm
- Absolute Pull Range (APR):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Spread Spectrum Bandwidth:
- -
- Current - Supply (Max):
- 35mA
- Ratings:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-VDFN (3.2x2.5)
- Size / Dimension:
- 0.203" L x 0.132" W (5.15mm x 3.35mm)
- Height - Seated (Max):
- 0.055" (1.40mm)
XLH536026.000000I FAQ
1.How can I place an order for XLH536026.000000I through Aetrix?
Please submit a Request for Quotation (RFQ) for XLH536026.000000I on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XLH536026.000000I reliable?
The price and inventory of XLH536026.000000I are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XLH536026.000000I is usually 5 days.
3.What payment methods are accepted for XLH536026.000000I?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XLH536026.000000I transactions.
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4.How is shipping managed for XLH536026.000000I?
XLH536026.000000I orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XLH536026.000000I order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XLH536026.000000I?
For technical support, including XLH536026.000000I datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XLH536026.000000I requirements.
6.How does Aetrix verify that XLH536026.000000I is sourced from the original manufacturer or authorized distributors?
All XLH536026.000000I products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XLH536026.000000I meets industry standards.
7.What is the process for return or replacement of XLH536026.000000I?
All XLH536026.000000I units undergo pre-shipment inspection (PSI). If there is an issue with XLH536026.000000I, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XLH536026.000000I part is unused and in its original packaging.
Return procedure for XLH536026.000000I:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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