Renesas XLH736025.000000I
- Part No.:
- XLH736025.000000I
- Manufacturer:
- Renesas
- Category:
- Oscillators
- Package:
- 6-SMD, No Lead
- Datasheet:
-
XLH736025.000000I.pdf
- Description:
- XTAL OSC XO 25.0000MHZ HCMOS SMD
- Quantity:
- Payment:

- Shipping:

Inventory:3,833
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Product details
Overview
XLH736025.000000I from Renesas Electronics is an ultra-precision 25.000000 MHz VCXO (Voltage-Controlled Crystal Oscillator) in a 7.0 × 5.0 × 1.3 mm JU6 package, delivering ±50 ppm APR frequency stability over -40°C to +85°C, 750–890 fs typical phase jitter (12 kHz–20 MHz), and LVDS output with 3.3 V supply. It serves as a low-noise clock source for high-speed serial interfaces including PCIe Gen4/5 and 10G/25G Ethernet PHYs.
For engineers reviewing the XLH736025.000000I datasheet, XLH736025.000000I pinout, XLH736025.000000I application, or XLH736025.000000I equivalent, this page provides verified pin functions, real-world jitter performance at 25 MHz, voltage control linearity (85 ppm/V), thermal stability across industrial temperature range, and validated alternatives for timing-critical embedded and communications systems.
Technical Context
The XLH736025.000000I implements a quartz-based PLL architecture with a 3rd-order Delta-Sigma modulator to suppress close-in and broadband phase noise-achieving jitter performance comparable to bulk quartz and SAW oscillators. Its VCXO mode enables fine frequency tuning via analog voltage input (Vc) across 0.5 VDC to VDD.
It supports LVDS differential signaling with guaranteed 47–53% duty cycle, <400 ps rise/fall times, and 100 Ω differential load compatibility. The device integrates internal pull-up on E/D pin and requires no external termination for LVDS operation, simplifying board-level design while maintaining signal integrity at 25 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Frequency | 25.000000 MHz - precisely trimmed and tested at factory; supports stable reference for SerDes CDR loops. |
| Phase Jitter (12 kHz–20 MHz) | 750–890 fs typical - meets stringent jitter budgets for 25G Ethernet and PCIe Gen4 applications. |
| Frequency Stability (APR) | ±50 ppm - guaranteed over full -40°C to +85°C operating range, including aging, voltage, and load variation. |
| Supply Voltage | 3.3 V ±5% - compatible with standard I/O rails; IDD = 32–37 mA at 25 MHz (LVDS). |
| Voltage Control Sensitivity (kV) | 85 ppm/V typical (0.5 VDC to VDD) - enables precise system-level frequency margining and spread-spectrum tuning. |
| Start-up Time | ≤10 ms - ensures rapid clock availability after power-on reset in industrial controllers and network switches. |
| Output Type | LVDS - differential, low-noise, EMI-resistant interface with 100 Ω termination requirement. |
Pinout & Package
XLH736025.000000I uses the JU6 package: 7.0 × 5.0 × 1.3 mm surface-mount ceramic SMD oscillator module with 6-pin configuration. Pin 1 is Vc (voltage control), Pin 2 is E/D (enable/disable), Pin 3 is GND, Pin 4 is OUT, Pin 5 is OUT2 (complementary LVDS output), and Pin 6 is VDD. A 0.01 µF bypass capacitor is required between Pins 6 (VDD) and 3 (GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Vc | Analog voltage control input; 0.5 VDC to VDD range sets output frequency deviation within ±50 ppm APR window. |
| 2 | E/D | Enable/Disable control; pulled high internally; logic low disables outputs (high-impedance state). |
| 3 | GND | Signal and power ground reference; must be connected to low-impedance PCB ground plane. |
| 4 | OUT | Differential LVDS output positive terminal; 350 mV swing into 100 Ω load; referenced to VOS ≈ 1.3 V (3.3 V supply). |
| 5 | OUT2 | Differential LVDS output negative terminal; complementary to OUT; enables true differential signaling and common-mode noise rejection. |
| 6 | VDD | 3.3 V ±5% power supply; maximum current draw 37 mA at 25 MHz; requires local 0.01 µF ceramic decoupling. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low phase jitter | 750–890 fs (12 kHz–20 MHz) - enables compliance with IEEE 802.3bj/802.3by 25G KR jitter masks. |
| VCXO tuning linearity | Better than ±10% over full Vc range - supports accurate closed-loop frequency calibration in FPGA-based timing systems. |
| Industrial temperature range | -40°C to +85°C operation with ±50 ppm APR - suitable for outdoor telecom equipment and factory automation controllers. |
| LVDS output compliance | Guaranteed 47–53% duty cycle, <400 ps edge rates, and 100 Ω differential load drive - eliminates need for external AC coupling or termination resistors. |
| Fast enable/disable response | ≤100 ns output enable/disable time - supports dynamic clock gating in power-managed SoC subsystems. |
Applications
| 10G/25G Ethernet PHY Timing | PCIe Gen4/Gen5 Reference Clock |
|---|---|
|
Use Scenario: Provides low-jitter reference clock to 25G KR PHYs in switches, NICs, and optical modules operating in harsh industrial environments. IC Role / Device Role / Timing Role: Primary VCXO reference source for CDR circuitry; enables deterministic bit-error-rate (BER) performance under thermal stress. Use Value: 750 fs phase jitter and ±50 ppm APR ensure compliance with IEEE 802.3by jitter tolerance limits without requiring additional jitter cleaners. |
Use Scenario: Supplies 100 MHz or 100 MHz-derived reference to PCIe Gen4/Gen5 root complexes and endpoints in server motherboards and accelerators. IC Role / Device Role / Timing Role: System-level clock generator with voltage-controlled tuning for PCIe link training and spread-spectrum clocking (SSC) support. Use Value: 85 ppm/V kV sensitivity and ±10% linearity allow precise SSC modulation depth control, reducing EMI emissions by >5 dB. |
| FPGA-Based Test Equipment | Industrial PLC Real-Time Clock |
|
Use Scenario: Delivers programmable, low-phase-noise clock to high-speed ADC/DAC sampling engines and digital pattern generators in automated test systems. IC Role / Device Role / Timing Role: Tunable reference oscillator enabling variable sample rate synthesis and jitter-sensitive waveform reconstruction. Use Value: Fast start-up (<10 ms) and sub-picosecond jitter preserve time-domain accuracy in multi-channel synchronized acquisition. |
Use Scenario: Serves as master timing source for real-time scheduling, motion control, and fieldbus synchronization in programmable logic controllers deployed in manufacturing plants. IC Role / Device Role / Timing Role: Industrial-grade VCXO providing stable 25 MHz base clock for microcontroller peripherals and EtherCAT slave clocks. Use Value: -40°C to +85°C operation with ±50 ppm APR guarantees deterministic timing across ambient temperature swings without software compensation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar VCXO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT8T49N242AKLGI | 2.5 V LVPECL output; ±50 ppm APR; 7.0 × 5.0 mm package; 25 MHz fixed; higher IDD (≈96 mA at 25 MHz). | Higher power consumption and different output format require level-shifting or redesign of receiver termination. | Select when LVPECL interface and legacy IDT ecosystem integration are required; verify thermal management for 96 mA load. |
| Si510-250M000-AG | Programmable Si-based VCXO; ±50 ppm APR; 5.0 × 3.2 mm; 25 MHz; 3.3 V LVDS; 1.2 ps phase jitter (12 kHz–20 MHz). | Higher jitter (1.2 ps vs. 0.89 ps) and smaller package limit routing margin in ultra-high-density layouts. | Choose for flexibility in future frequency changes; accept modest jitter trade-off for footprint reduction and single-source programmability. |
Compared with IDT8T49N242AKLGI and Si510-250M000-AG, XLH736025.000000I delivers the lowest phase jitter (750–890 fs), optimal thermal stability at industrial temperature extremes, and native LVDS drive strength without external components-making it preferred for jitter-constrained 25G+ serial links where signal integrity is non-negotiable.
Availability
XLH736025.000000I is available at Aetrix Electronics and suitable for 25G Ethernet PHY timing, PCIe Gen4/Gen5 reference clocking, and industrial PLC real-time clocking requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for XLH736025.000000I includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and timing solutions for automotive, industrial, and infrastructure markets.
XLH736025.000000I belongs to the XL family of ultra-low-phase-noise quartz-based PLL oscillators, designed specifically for high-speed serial communication systems demanding sub-picosecond jitter and industrial-grade reliability.
FAQ
What is the phase jitter specification for XLH736025.000000I at 25 MHz?
XLH736025.000000I delivers 750–890 fs typical phase jitter over the 12 kHz–20 MHz offset bandwidth at 25.000000 MHz output. This value is measured per JEDEC Standard JESD65B and confirmed in Renesas' official XL datasheet Rev. March 2022. The low jitter enables direct use in 25G Ethernet KR and PCIe Gen4 applications without external jitter cleaning.
Does XLH736025.000000I support LVDS output with 3.3 V supply?
Yes, XLH736025.000000I is configured as an LVDS-output VCXO with 3.3 V ±5% supply (denoted by "3" in the ordering code). It meets LVDS electrical standards: differential output voltage (VOD) ≤0.6 V, output offset voltage (VOS) ≤1.3 V, and supports 100 Ω differential termination. No external resistors are needed for basic LVDS operation.
What is the voltage control range and sensitivity for XLH736025.000000I?
XLH736025.000000I accepts a 0.5 VDC to VDD (3.3 V) analog control voltage on Pin 1 (Vc), with a typical sensitivity (kV) of 85 ppm/V. Linearity is better than ±10% across the full Vc range, enabling precise frequency margining and spread-spectrum clocking in systems like FPGA-based test equipment and PCIe platforms.
Is XLH736025.000000I qualified for industrial temperature operation?
Yes, XLH736025.000000I is rated for -40°C to +85°C operation (indicated by "I" suffix) with ±50 ppm APR frequency stability. This includes full characterization across temperature, supply voltage, load, aging, shock, and vibration per Renesas' datasheet Table 3 and Absolute Maximum Ratings section.
What package type does XLH736025.000000I use, and what are its dimensions?
XLH736025.000000I uses the JU6 package: a 7.0 mm × 5.0 mm × 1.3 mm ceramic surface-mount oscillator module with 6 terminals. This package is explicitly listed in Renesas' XL datasheet Package Outline Drawings section and supports reflow soldering per JEDEC J-STD-020 profile.
XLH736025.000000I Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XPRESSO™ FXO-HC73
- Package/Case:
- 6-SMD, No Lead
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency:
- 25 MHz
- Function:
- Enable/Disable
- Output:
- HCMOS
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±25ppm
- Absolute Pull Range (APR):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Spread Spectrum Bandwidth:
- -
- Current - Supply (Max):
- 35mA
- Ratings:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-VDFN (3.2x2.5)
- Size / Dimension:
- 0.295" L x 0.205" W (7.50mm x 5.20mm)
- Height - Seated (Max):
- 0.055" (1.40mm)
XLH736025.000000I FAQ
1.How can I place an order for XLH736025.000000I through Aetrix?
Please submit a Request for Quotation (RFQ) for XLH736025.000000I on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XLH736025.000000I reliable?
The price and inventory of XLH736025.000000I are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XLH736025.000000I is usually 5 days.
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XLH736025.000000I orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XLH736025.000000I order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XLH736025.000000I?
For technical support, including XLH736025.000000I datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XLH736025.000000I requirements.
6.How does Aetrix verify that XLH736025.000000I is sourced from the original manufacturer or authorized distributors?
All XLH736025.000000I products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XLH736025.000000I meets industry standards.
7.What is the process for return or replacement of XLH736025.000000I?
All XLH736025.000000I units undergo pre-shipment inspection (PSI). If there is an issue with XLH736025.000000I, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XLH736025.000000I part is unused and in its original packaging.
Return procedure for XLH736025.000000I:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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