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Texas Instruments XRM48L950PGET
- Part No.:
- XRM48L950PGET
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
XRM48L950PGET.pdf
- Description:
- IC MCU 16/32BIT 3MB FLSH 144LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,299
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Product details
Overview
XRM48L950PGET from Texas Instruments is a safety-certified 32-bit ARM Cortex-R4F microcontroller designed for lockstep dual-CPU real-time control in functional safety systems. It delivers 332 DMIPS at 200 MHz, integrates 3 MB flash with ECC, 256 KB RAM with ECC, and supports IEEE 802.3-compliant 10/100 Mbps Ethernet, three CAN 2.0B controllers, and dual N2HET timing coprocessors - deployed in industrial PLCs, medical infusion pumps, and wind turbine control.
For engineers reviewing the XRM48L950PGET datasheet, XRM48L950PGET pinout, XRM48L950PGET application, or XRM48L950PGET equivalent, key selection criteria include ASIL-D readiness via BIST/ECC/error signaling, 144-pin LQFP (PGE) package compatibility, dual 12-bit MibADCs with 24-channel support, FMPLL clocking with slip detection, and trace/debug capability via ETM-R4 and RTP/DMM modules.
Technical Context
The XRM48L950PGET implements dual ARM Cortex-R4F CPUs executing identical instructions in lockstep with continuous comparison, supported by CPU BIST, memory ECC (flash/RAM), and parity-protected peripheral memories. Its safety architecture includes an Error Signaling Module (ESM) that asserts the dedicated nERROR pin on fault detection.
Real-time control is enabled by two Next Generation High-End Timer (N2HET) modules - N2HET1 with 32 programmable channels and N2HET2 with 18 - each backed by a dedicated HTU DMA engine and MPU. The device also integrates a 16-bit External Memory Interface (EMIF) supporting SDRAM and FPGA expansion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-R4F, 32-bit RISC, 200 MHz max, 1.66 DMIPS/MHz → 332 DMIPS performance |
| Memory | 3 MB program flash with ECC + 256 KB SRAM with ECC + 64 KB emulated EEPROM flash |
| Safety Features | Dual lockstep CPUs, BIST for CPU/RAM, ECC on flash & RAM, parity on peripheral RAMs, ESM with nERROR pin |
| Analog Peripherals | Two 12-bit MibADCs: ADC1 (24 channels), ADC2 (16 shared), 64-word parity-protected buffers each |
| Communication | 3× DCAN (CAN 2.0B), 1× EMAC (MII/RMII/MDIO), 2× USB (1 host + 1 device), 3× MibSPI, 2× SPI, 1× I2C, 1× SCI, 1× LIN |
| Timing & Clock | FMPLL + non-modulating PLL, 7-clock-domain GCM, RTI timer, 96-channel VIM interrupt controller |
| Package | LQFP-144 (PGE), 20.0 mm × 20.0 mm, green RoHS-compliant |
Pinout & Package
The XRM48L950PGET is housed in a 144-pin LQFP (PGE) package with 16 GPIO pins capable of generating interrupts, plus dedicated pins for EMAC, USB, CAN, N2HET, MibADC, and debug interfaces including JTAG, ETM, and RTP.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| nPORRST | Power-on reset input | Active-low asynchronous reset asserted during power ramp; initiates full device initialization sequence |
| nRST | Warm reset input | Active-low synchronous reset that preserves certain power domain states and enables fast recovery |
| nERROR | Error signaling output | Open-drain output driven low by ESM on detected fault (e.g., ECC double-bit error, BIST failure) |
| ECLK | External clock monitor output | Programmable-frequency output derived from VCLK; used for external validation of system clock integrity |
| GIOA[0]–GIOA[7], GIOB[0]–GIOB[7] | General-purpose I/O | 16 pins configurable as inputs/outputs with interrupt capability; multiplexed with peripheral functions (e.g., CAN, SPI, ADC) |
| MIBSPI1_CLK / SIMO / SOMI / nCS[0–3] | MibSPI1 interface | Primary high-speed serial interface supporting up to 6 chip selects; used for sensor/actuator communication with CRC and parity |
Key Features
| Feature | Design Value |
|---|---|
| Dual lockstep Cortex-R4F CPUs | Hardware-enforced instruction-level redundancy with real-time comparison and fault reporting via ESM |
| Integrated safety monitoring | Built-in voltage/clock monitoring, parity/ECC checking, and automatic error pin assertion without software intervention |
| N2HET timing coprocessors | Two independent intelligent timers (32+18 channels) offloading complex PWM, capture, and GPIO timing from main CPU |
| Trace & calibration infrastructure | ETM-R4 instruction/data trace, RTP for RAM/peripheral access tracing, DMM for external memory writes, POM for runtime parameter overlay |
| Functional safety certification support | Architected to meet IEC 61508 SIL-3 and ISO 26262 ASIL-D requirements with documented FMEDA and safety manual |
Applications
| Industrial Safety PLCs | Medical Infusion Pumps |
|---|---|
Use Scenario: Safe programmable logic controller executing motion control, emergency stop logic, and safety interlocks in factory automation. IC Role / Device Role / Timing Role: Primary safety controller running certified runtime firmware with lockstep CPU verification and ECC-protected code execution. Use Value: Enables SIL-3 compliance through hardware BIST, memory ECC, and ESM-driven fail-safe shutdown within <100 µs of fault detection. | Use Scenario: Precision fluid delivery system requiring fault-tolerant motor control, pressure sensing, and human-interface monitoring. IC Role / Device Role / Timing Role: Central safety MCU managing ADC sampling of flow/pressure sensors, N2HET-driven stepper motor timing, and CAN-based pump status reporting. Use Value: Dual MibADCs with 24-channel sequencing and parity-protected buffers ensure accurate, time-synchronized analog acquisition for dose-critical calculations. |
| Wind Turbine Pitch Control | Radiation Therapy Beam Control |
Use Scenario: Real-time blade pitch adjustment based on wind speed, torque, and vibration feedback in harsh electromagnetic environments. IC Role / Device Role / Timing Role: Safety-critical actuator controller interfacing with position encoders, current sensors, and hydraulic valves via CAN and SPI. Use Value: Three DCAN controllers with 1 Mbps robustness and EMIF support for external watchdog co-processors enable redundant, noise-immune fieldbus communication. | Use Scenario: Sub-second beam modulation system requiring deterministic timing, radiation-hardened operation, and fault containment. IC Role / Device Role / Timing Role: Real-time safety supervisor coordinating X-ray source firing, collimator positioning, and dosimetry feedback using N2HET-generated pulse trains. Use Value: N2HET1's 32-channel hardware angle generator provides sub-microsecond jitter-free timing for beam gating signals, eliminating CPU scheduling latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar safety microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RM48L952ZWT | 337-ball NFBGA (ZWT) package; same core/peripherals but different pinout and thermal profile | Preferred for space-constrained PCBs with multilayer routing; requires redesign for 144-pin LQFP footprint | Select when board layout allows BGA and higher I/O density is needed; not drop-in compatible with XRM48L950PGET |
| RM46L852ZWT | ARM Cortex-R5F core (333 MHz), 4 MB flash, 512 KB RAM, ePWM/eCAP/eQEP peripherals added | Targeted at motor control and digital power conversion; lacks N2HET but adds advanced PWM timing blocks | Choose for servo drive or inverter applications needing enhanced PWM resolution; not functionally equivalent for N2HET-dependent timing tasks |
Compared with RM48L952ZWT and RM46L852ZWT, the XRM48L950PGET uniquely balances LQFP manufacturability, N2HET-based deterministic timing, and ASIL-D-ready safety architecture - making it optimal for industrial and medical systems where pin-compatible upgrade paths and proven field reliability are prioritized over raw clock speed or BGA density.
Availability
XRM48L950PGET is available at Aetrix Electronics and suitable for industrial safety PLCs, medical infusion pumps, and wind turbine control systems requiring stable component supply across long production lifecycles.
Supply support for XRM48L950PGET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with decades of automotive and industrial safety IC expertise.
The RM48Lx50 product line was engineered specifically for IEC 61508 and ISO 26262 functional safety applications - integrating lockstep CPUs, memory ECC, and hardware error signaling into a single-chip solution for safety-critical real-time control.
FAQ
What safety certifications does the XRM48L950PGET support?
The XRM48L950PGET is architected to support IEC 61508 SIL-3 and ISO 26262 ASIL-D compliance. Texas Instruments provides a full safety manual, FMEDA report, and diagnostic software library for XRM48L950PGET - enabling certified system development without requiring custom safety hardware. All safety mechanisms (lockstep, ECC, BIST, ESM) are implemented in silicon and validated per AEC-Q100 Grade 1.
Does the XRM48L950PGET support external memory expansion?
Yes, the XRM48L950PGET includes a 16-bit External Memory Interface (EMIF) supporting synchronous DRAM (SDRAM), asynchronous SRAM, Flash, and FPGA devices. The EMIF operates with configurable wait states and supports up to 4 chip selects. This capability is fully documented in the XRM48L950PGET Technical Reference Manual (SPNU503) and verified in TI's RM48-HDK reference design.
How many CAN interfaces does the XRM48L950PGET integrate?
The XRM48L950PGET integrates three Controller Area Network (DCAN) modules compliant with CAN Protocol Version 2.0B, supporting data rates up to 1 Mbps. Each DCAN includes 64 mailboxes with parity protection and supports both standard and extended identifier formats - confirmed in Section 7.5 of the XRM48L950PGET datasheet (SPNS174C).
What is the maximum ADC sampling rate achievable with the XRM48L950PGET?
The XRM48L950PGET's dual 12-bit MibADC modules support up to 5 MSPS aggregate throughput when configured in interleaved mode. Individual channel conversion time is 200 ns minimum, with sequencer-triggered group conversions completing in ≤1.2 µs for 16-channel sequences - values measured and specified in Section 7.2 of the XRM48L950PGET datasheet under recommended operating conditions.
Is the XRM48L950PGET pin-compatible with other RM48Lx50 variants?
The XRM48L950PGET shares identical pinout and signal mapping with RM48L750PGE and RM48L550PGE in the 144-pin LQFP (PGE) package - enabling direct substitution where flash/RAM capacity permits. However, it is not pin-compatible with ZWT-package variants (e.g., RM48L950ZWT) due to differing ball/pin assignments and power domain layouts.
XRM48L950PGET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 144-LQFP
- Series:
- Hercules™ RM4 ARM® Cortex®-R4
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-R4F
- Core Size:
- 16/32-Bit
- Speed:
- 200MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, POR, PWM, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.14V ~ 1.32V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
XRM48L950PGET FAQ
1.How can I place an order for XRM48L950PGET through Aetrix?
Please submit a Request for Quotation (RFQ) for XRM48L950PGET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for XRM48L950PGET reliable?
The price and inventory of XRM48L950PGET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for XRM48L950PGET is usually 5 days.
3.What payment methods are accepted for XRM48L950PGET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for XRM48L950PGET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for XRM48L950PGET?
XRM48L950PGET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your XRM48L950PGET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for XRM48L950PGET?
For technical support, including XRM48L950PGET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your XRM48L950PGET requirements.
6.How does Aetrix verify that XRM48L950PGET is sourced from the original manufacturer or authorized distributors?
All XRM48L950PGET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that XRM48L950PGET meets industry standards.
7.What is the process for return or replacement of XRM48L950PGET?
All XRM48L950PGET units undergo pre-shipment inspection (PSI). If there is an issue with XRM48L950PGET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The XRM48L950PGET part is unused and in its original packaging.
Return procedure for XRM48L950PGET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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