Renesas ZSPM4013BA1W00
- Part No.:
- ZSPM4013BA1W00
- Manufacturer:
- Renesas
- Package:
- -
- Datasheet:
-
ZSPM4013BA1W00.pdf
- Description:
- IC REG PQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,015
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ZSPM4013BA1W00 from Integrated Device Technology (IDT) is a fully integrated 3A synchronous buck converter with adjustable output voltage (0.9V–5.5V), 1MHz fixed switching frequency, and internal compensation. It delivers up to 95% efficiency across load range, features current-mode PWM/PFM hybrid control, and integrates full fault protection including over-current, thermal shutdown, and VOUT over-voltage detection - deployed in wireless access points and portable GPS systems.
For engineers reviewing the ZSPM4013BA1W00 datasheet, ZSPM4013BA1W00 pinout, ZSPM4013BA1W00 application, or ZSPM4013BA1W00 equivalent, key selection criteria include its 16-pin 3×3mm QFN package, 4.5–18V input range, 3A continuous output, soft-start timing (4ms), and PG open-drain supervision for system-level power sequencing.
Technical Context
The ZSPM4013BA1W00 implements current-mode pulse-width modulation with automatic transition to pulse-frequency modulation at light loads, enabling high efficiency down to microamp quiescent current. Its internal high-side (180mΩ) and low-side (120mΩ) MOSFETs are driven by a bootstrap-controlled gate driver referenced to the VSW node.
Protection logic includes cycle-by-cycle over-current detection (3.4–4.4A threshold), thermal shutdown at 170°C (with 10°C hysteresis), VCC under-voltage lockout (4.3V typ., 325mV hysteresis), and output monitoring via FB pin with dedicated VOUT-UV (90% VOUT) and VOUT-OV (103% VOUT) comparators feeding the PG output and tri-state VSW control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 18V - supports wide-input industrial and automotive power rails without pre-regulation. |
| Output Current | 3A continuous - sustains full-rated load without derating at TJ ≤ 125°C with standard PCB copper. |
| Switching Frequency | 1MHz ±10% - enables compact 4.7µH inductor and 44µF ceramic output capacitor design. |
| Efficiency | Up to 95% - achieved via low-RDS(on) integrated FETs and PFM mode operation below ~200mA load. |
| Quiescent Current | <10µA in disabled mode - minimizes battery drain in standby applications like portable GPS. |
| Feedback Reference | 0.9V ±1.5% - sets precise output voltage in adjustable mode using external resistor divider. |
| Soft Start Time | 4ms - prevents output overshoot during startup and limits inrush current into bulk capacitance. |
| Thermal Shutdown | 170°C typical, 10°C hysteresis - protects die integrity while allowing autonomous recovery at 160°C. |
Pinout & Package
Packaged in a thermally enhanced 16-pin QFN (3mm × 3mm, 0.5mm pitch) with exposed thermal pad (Pin 16). Pin 1 marked by dot; pins numbered counterclockwise from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSW (Pins 1, 12, 13, 16) | Switching Node | Connects directly to inductor; carries high di/dt AC current and must be routed with minimal loop area. |
| VCC (Pins 2, 3, 11) | Unregulated Input Supply | Distributes input power to internal circuitry and gate drivers; requires local 10µF ceramic bypass. |
| GND (Pin 4) | Analog Ground | Reference for error amplifier, oscillator, and feedback comparator - isolated from power ground paths. |
| FB (Pin 5) | Feedback Input | Senses output voltage via resistor divider; 0.9V reference enables 0.9–5.5V adjustable regulation. |
| PG (Pin 8) | Power Good Output | Open-drain signal asserted low until VOUT reaches 90% target and remains stable for 10ms. |
| EN (Pin 9) | Enable Control | Active-high logic input (VIH = 2.2V); internal pull-up allows default-enable if left floating. |
| BST (Pin 10) | Bootstrap Capacitor Terminal | Drives high-side FET gate; requires 22nF ceramic cap connected between BST and VSW. |
| PGND (Pins 14, 15) | Power Ground | Low-impedance return path for high-current switching loops - tied to thermal pad and inductor ground. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Power Stage | High-side (180mΩ) and low-side (120mΩ) MOSFETs eliminate external switch selection and layout complexity. |
| Internal Compensation | Eliminates external compensation network - optimized for 4.7µH/44µF LC filter, reducing BOM count. |
| Hybrid PWM/PFM Control | Automatically switches to PFM below ~200mA load, maintaining >85% efficiency at 10mA output. |
| Comprehensive Fault Reporting | PG pin signals VOUT status; internal tri-state VSW action on OV/OC/thermal events prevents cascading failures. |
| Robust Startup Sequence | 4ms soft-start ramp + VCC UVLO (4.3V) + EN hysteresis (480mV) ensure controlled, repeatable power-up. |
| Minimal External Components | Only four required: CBYPASS (10µF), CBST (22nF), LOUT (4.7µH), COUT (2×22µF) - no compensation or sensing resistors. |
Applications
| Wireless Access Point Power | Portable GPS Core Supply |
|---|---|
Use Scenario: Powers baseband processor and RF transceiver in 802.11ac access point with dynamic load ranging from 50mA idle to 2.8A transmit burst. IC Role / Device Role / Timing Role: Primary 3.3V/2A DC-DC regulator delivering clean, sequenced supply with PG confirmation before host boot. Use Value: 1MHz switching avoids interference with 2.4GHz/5GHz bands; PFM mode extends battery backup runtime during low-traffic periods. | Use Scenario: Supplies 1.8V core voltage to GPS baseband SoC in handheld navigation device powered by single-cell Li-ion (3.0–4.2V). IC Role / Device Role / Timing Role: Input-capable buck converter stepping down variable battery voltage to stable 1.8V with soft-start and thermal foldback. Use Value: 4.5V minimum input accommodates full battery discharge curve; <10µA disable current preserves battery during sleep mode. |
| LCD Display Backlight Driver | Set-Top Box FPGA Core Rail |
Use Scenario: Generates 5.0V rail for white LED backlight array in 10-inch industrial LCD panel with dimming control via EN pin. IC Role / Device Role / Timing Role: Adjustable-output buck converter configured for 5V fixed output; EN toggled for PWM dimming at 200Hz. Use Value: Integrated current limit (4.4A peak) safely handles LED surge during cold start; PG confirms rail readiness before backlight enable. | Use Scenario: Provides 1.2V core supply to Xilinx Spartan-6 FPGA in cable set-top box, handling load transients up to 2A/µs during video decode bursts. IC Role / Device Role / Timing Role: High-efficiency synchronous buck delivering tightly regulated 1.2V with fast transient response and PG sequencing. Use Value: 1MHz switching enables <50mV output deviation during 1A load step; thermal shutdown (170°C) prevents damage during sustained HD video processing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2315DJ-LF-Z | 2.5A rated, 2.2MHz switching, 4.5–16V input, no PG output, 12-pin QFN | Lacks power-good reporting and thermal hysteresis; lower current rating limits use in 3A steady-state designs. | Select when board space is constrained and PG signaling is not required; verify thermal margin at full 2.5A load. |
| TPS54332DR | 3A rated, 1MHz, 3.5–28V input, external compensation, SOIC-8 package | Requires external compensation components and larger footprint; lacks integrated BST capacitor drive and PFM mode. | Choose for higher input voltage tolerance (28V) or when SOIC-8 assembly is preferred over QFN reflow; accept added BOM and layout effort. |
Compared with MP2315DJ-LF-Z and TPS54332DR, the ZSPM4013BA1W00 provides integrated PG supervision, true 3A capability with thermal hysteresis, and minimal external component count - making it optimal for space-constrained, system-sequenced applications requiring robust fault reporting.
Availability
ZSPM4013BA1W00 is available at Aetrix Electronics and suitable for wireless infrastructure, portable navigation, LCD display, and set-top box applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for ZSPM4013BA1W00 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Integrated Device Technology (IDT), now part of Renesas Electronics, designs high-performance timing, memory interface, and power management ICs for communications, computing, and consumer markets.
The ZSPM4013B family targets compact, high-efficiency point-of-load conversion in space-sensitive applications such as portable electronics and networking equipment - emphasizing integration, protection, and ease of use.
FAQ
What output voltage range does the ZSPM4013BA1W00 support?
The ZSPM4013BA1W00 supports an adjustable output voltage range of 0.9V to 5.5V, set via an external resistor divider on the FB pin. Its internal 0.9V ±1.5% reference enables precise regulation across this range. This configuration is confirmed in the ordering code "A1W00", where "00" denotes the adjustable version - distinct from fixed-output variants (e.g., "W18" = 1.8V). The ZSPM4013BA1W00 does not support output voltages below 0.9V or above 5.5V under recommended operating conditions.
Does the ZSPM4013BA1W00 require external compensation components?
No, the ZSPM4013BA1W00 features fully integrated internal compensation optimized for a 4.7µH inductor and 44µF output capacitor. This eliminates the need for external RC networks, reducing design time and BOM count. The internal compensation ensures stable operation across the full 0.9V–5.5V output range and 4.5V–18V input range without user tuning - verified in the datasheet's Electrical Characteristics table and Application Circuits section.
How does the ZSPM4013BA1W00 handle over-current conditions?
The ZSPM4013BA1W00 implements cycle-by-cycle over-current detection with a typical threshold of 3.8A. When exceeded, the high-side switch is immediately terminated within that cycle. Under sustained overload, the device disables VSW outputs and asserts PG low. Recovery requires toggling the EN pin. This behavior is documented in Section 3.2.1 and Table 1.5 of the datasheet, and applies identically across all ZSPM4013B variants including the ZSPM4013BA1W00.
What is the purpose of the BST pin on the ZSPM4013BA1W00?
On the ZSPM4013BA1W00, the BST (Bootstrap) pin supplies gate drive voltage to the internal high-side MOSFET. It requires a 22nF ceramic capacitor connected between BST and VSW to generate the boosted voltage needed for full enhancement. This bootstrap architecture eliminates the need for a separate high-voltage supply, and the BST pin's function is identical across all ZSPM4013B packages - confirmed in Pin Description Table 5.1 and Figure 4.1 of the datasheet.
Can the ZSPM4013BA1W00 operate with input voltage below 4.5V?
No, the ZSPM4013BA1W00 has a specified minimum input voltage of 4.5V per Recommended Operating Conditions (Table 1.3). Below this, VCC under-voltage lockout activates at 4.3V typical, holding the device in reset. Attempting operation at 4.2V or lower risks unstable regulation, failure to start, or undefined protection behavior - all outside guaranteed specifications. This limit is inherent to the ZSPM4013BA1W00's internal biasing and gate drive requirements.
ZSPM4013BA1W00 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
ZSPM4013BA1W00 FAQ
1.How can I place an order for ZSPM4013BA1W00 through Aetrix?
Please submit a Request for Quotation (RFQ) for ZSPM4013BA1W00 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ZSPM4013BA1W00 reliable?
The price and inventory of ZSPM4013BA1W00 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ZSPM4013BA1W00 is usually 5 days.
3.What payment methods are accepted for ZSPM4013BA1W00?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ZSPM4013BA1W00 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ZSPM4013BA1W00?
ZSPM4013BA1W00 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ZSPM4013BA1W00 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ZSPM4013BA1W00?
For technical support, including ZSPM4013BA1W00 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ZSPM4013BA1W00 requirements.
6.How does Aetrix verify that ZSPM4013BA1W00 is sourced from the original manufacturer or authorized distributors?
All ZSPM4013BA1W00 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ZSPM4013BA1W00 meets industry standards.
7.What is the process for return or replacement of ZSPM4013BA1W00?
All ZSPM4013BA1W00 units undergo pre-shipment inspection (PSI). If there is an issue with ZSPM4013BA1W00, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ZSPM4013BA1W00 part is unused and in its original packaging.
Return procedure for ZSPM4013BA1W00:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ZSPM4013BA1W00 Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

