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Home > Products > Crystals, Oscillators, Resonators > Programmable Oscillators

Skyworks Solutions Inc. 511ECB-CBAG

Name: 511ECB-CBAG
Brand: Skyworks Solutions Inc.
SKU: 511ECB-CBAG
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 511ECB-CBAG

Manufacturer:: Skyworks Solutions Inc.

Category:: Programmable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 511ECB-CBAG.pdf

Description:: XTAL OSC PROG XO LVPECL 2.5V

Quantity:: RFQ Add To RFQ list

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Product details

Overview

511ECB-CBAG from Skyworks Solutions is a factory-programmed, low-jitter crystal oscillator (XO) with DSPLL-based frequency synthesis, delivering 156.25 MHz output in LVPECL format at 2.5 V supply, ±30 ppm total stability over –40 to +85 °C, and 5 × 7 mm 6-pin package. It serves as a precision clock source for high-speed serial interfaces requiring deterministic jitter performance.

For engineers reviewing the 511ECB-CBAG datasheet, 511ECB-CBAG pinout, 511ECB-CBAG application, or 511ECB-CBAG equivalent, this device offers verified phase jitter (0.31 ps RMS, 1.875–20 MHz), integrated LDO noise filtering, runt suppression on OE, and production-tested crystal ESR/DLD - critical for PCIe Gen3/4, 10G Ethernet, and FPGA timing integrity.

Technical Context

The 511ECB-CBAG implements Skyworks' DSPLL architecture with a fixed internal crystal and digital synthesizer, enabling any-frequency output from 100 kHz to 250 MHz without custom crystals. Its LVPECL output stage delivers 0.55–0.90 V_PPSE swing into 50 Ω with 50% duty cycle tolerance (±2%).

It integrates an on-chip LDO regulator for supply noise rejection (3.0–3.5 ps additive jitter from 10–1000 kHz VDD noise), supports active-high OE on Pin 1 with internal pull-up, and features runt suppression during power-on and OE transitions - ensuring glitch-free clock enablement in synchronous systems.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequency	156.25 MHz - precisely matches common Ethernet, OTN, and PCIe reference clocks.
Output Format	LVPECL - differential, high-speed interface compatible with SERDES receivers requiring <1.3 ps RMS period jitter.
Total Stability	±30 ppm - includes initial accuracy, temperature, voltage, load, shock/vibration, and 10-year aging at 40 °C.
Supply Voltage	2.5 V ±10% - enables direct integration with 2.5 V logic domains and reduces power vs. 3.3 V alternatives.
Phase Jitter (RMS)	0.31 ps (1.875–20 MHz) - meets stringent jitter budgets for 10G+ serial links and high-speed ADC/DAC sampling clocks.
Startup Time	≤10 ms - ensures rapid system initialization after power-on reset without external delay circuitry.
Operating Temp	–40 to +85 °C - qualified for industrial and telecom infrastructure environments.

Pinout & Package

511ECB-CBAG uses a 5 × 7 mm, 6-pin surface-mount package (CLCC-style) with gull-wing leads. Pin 1 is OE (active-high, internal pull-up), Pin 3 is GND, Pin 4 is CLK+, Pin 5 is CLK−, and Pin 6 is VDD. Pin 2 is NC and must remain unconnected.

Pin/Terminal	Circuit Role	Design Meaning
1	OE	Active-high output enable with internal pull-up resistor (45 kΩ); asserts runt suppression during assertion/deassertion.
2	NC	No connect - electrically isolated; must not be soldered or tied to any net.
3	GND	Electrical and case ground reference for all internal circuits and output drivers.
4	CLK+	Differential LVPECL positive output - requires 50 Ω termination to VDD − 2 V for specified swing and symmetry.
5	CLK−	Differential LVPECL complementary output - matched routing length critical for skew control (<10 ps).
6	VDD	2.5 V power supply input - filtered internally by on-chip LDO; decoupling capacitor required per layout guidelines.

Key Features

Feature	Design Value
DSPLL Any-Frequency Synthesis	Generates exact 156.25 MHz from fixed crystal - eliminates crystal procurement delays and binning variability.
On-Chip LDO Regulator	Provides >30 dB supply noise rejection up to 1 MHz - simplifies PCB power delivery for low-jitter operation in noisy SoC environments.
Runt Suppression	Prevents sub-cycle glitches on CLK+/CLK− during OE assertion and power-on - avoids false clock edges in synchronous logic.
Production-Tested Crystal ESR & DLD	Guarantees long-term reliability and frequency stability - each unit validated for motional resistance and drive-level dependency.
Industry-Standard 5 × 7 mm Package	Drop-in compatible with legacy XO footprints - no PCB redesign needed when upgrading from quartz-only oscillators.

Applications

PCIe Gen3/Gen4 Reference Clock	10G/25G Ethernet PHY Timing
Use Scenario: Provides the 100 MHz or 156.25 MHz reference clock for PCIe root complex and endpoint controllers in servers and accelerators. IC Role / Device Role / Timing Role: Primary low-jitter system clock source feeding PLLs inside PCIe SerDes blocks. Use Value: Meets PCIe Gen4 jitter spec (≤1.0 ps RMS, 1.875–20 MHz) with margin, eliminating need for external jitter cleaners.	Use Scenario: Supplies the 156.25 MHz clock to SFP28/QSFP28 transceivers and MAC/PHY ICs in data center switches. IC Role / Device Role / Timing Role: Master timing reference for PMA/PMD layers in IEEE 802.3by/802.3cc compliant links. Use Value: Delivers 0.31 ps RMS phase jitter - 3× tighter than required for 25G KR/KP compliance, improving BER margin.
FPGA/ASIC High-Speed I/O Clocking	Telecom OTN/SDH Line Cards
Use Scenario: Drives high-speed transceivers (e.g., Xilinx GTY, Intel Stratix 10 H-Tile) in programmable logic platforms. IC Role / Device Role / Timing Role: Low-phase-noise clock generator for multi-gigabit serial I/O banks and memory interfaces. Use Value: Phase noise of –136 dBc/Hz at 1 MHz offset enables clean sampling of 16+ Gbps NRZ/PAM4 signals.	Use Scenario: Generates STS-192/OC-192 or OTU3/OTU4 line-rate clocks (9.953 Gbps, 39.813 Gbps) in optical transport equipment. IC Role / Device Role / Timing Role: Stratum-3E-compliant timing source for framers, mappers, and FEC engines. Use Value: ±30 ppm total stability over 10 years satisfies GR-1244-CORE and ITU-T G.813 requirements.

PCIe Gen3/Gen4 Reference Clock

10G/25G Ethernet PHY Timing

Use Scenario: Provides the 100 MHz or 156.25 MHz reference clock for PCIe root complex and endpoint controllers in servers and accelerators.

IC Role / Device Role / Timing Role: Primary low-jitter system clock source feeding PLLs inside PCIe SerDes blocks.

Use Value: Meets PCIe Gen4 jitter spec (≤1.0 ps RMS, 1.875–20 MHz) with margin, eliminating need for external jitter cleaners.

Use Scenario: Supplies the 156.25 MHz clock to SFP28/QSFP28 transceivers and MAC/PHY ICs in data center switches.

IC Role / Device Role / Timing Role: Master timing reference for PMA/PMD layers in IEEE 802.3by/802.3cc compliant links.

Use Value: Delivers 0.31 ps RMS phase jitter - 3× tighter than required for 25G KR/KP compliance, improving BER margin.

FPGA/ASIC High-Speed I/O Clocking

Telecom OTN/SDH Line Cards

Use Scenario: Drives high-speed transceivers (e.g., Xilinx GTY, Intel Stratix 10 H-Tile) in programmable logic platforms.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator for multi-gigabit serial I/O banks and memory interfaces.

Use Value: Phase noise of –136 dBc/Hz at 1 MHz offset enables clean sampling of 16+ Gbps NRZ/PAM4 signals.

Use Scenario: Generates STS-192/OC-192 or OTU3/OTU4 line-rate clocks (9.953 Gbps, 39.813 Gbps) in optical transport equipment.

IC Role / Device Role / Timing Role: Stratum-3E-compliant timing source for framers, mappers, and FEC engines.

Use Value: ±30 ppm total stability over 10 years satisfies GR-1244-CORE and ITU-T G.813 requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si510ECB-CBAG	CMOS output, 4-pin 5 × 7 mm package, max 212.5 MHz, higher current draw (26 mA vs. 43 mA), no differential signaling.	Suitable for single-ended clock trees with lower speed or cost-sensitive designs; not viable for >10 Gbps differential links.	Select only if system lacks LVPECL receivers or requires simpler termination and lower EMI.
MAX2671ETL+	3.3 V LVPECL, ±50 ppm stability, 156.25 MHz fixed, no DSPLL - uses traditional crystal; higher phase jitter (0.8 ps RMS).	Legacy design replacement where DSPLL programmability is unnecessary and ±50 ppm stability suffices.	Choose when supply chain prefers non-configurable oscillators and jitter budget allows ≥0.8 ps RMS.

Compared with Si510ECB-CBAG and MAX2671ETL+, the 511ECB-CBAG uniquely combines LVPECL output, ±30 ppm stability, and DSPLL-based jitter performance - making it optimal for next-generation serial link timing where signal integrity and long-term accuracy are co-constrained.

Availability

511ECB-CBAG is available at Aetrix Electronics and suitable for PCIe Gen4 reference clocking, 10G/25G Ethernet PHY timing, and FPGA high-speed transceiver applications requiring stable component supply across industrial and telecom lifecycles.

Supply support for 511ECB-CBAG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si510/511 family was designed specifically for high-reliability, any-frequency clock generation in networking, datacenter, and telecom infrastructure - replacing quartz-only XOs with digitally enhanced stability and flexibility.

FAQ

What output format and supply voltage does the 511ECB-CBAG use?

The 511ECB-CBAG is configured as an LVPECL oscillator operating at 2.5 V nominal supply (±10%). Its differential outputs (CLK+, CLK−) deliver 0.55–0.90 V_PPSE into 50 Ω loads referenced to VDD − 2 V, meeting JEDEC JESD8-12 standards. This configuration is factory-programmed and immutable post-shipment.

What is the total frequency stability specification for the 511ECB-CBAG?

The 511ECB-CBAG guarantees ±30 ppm total stability across its full operating range. This value includes initial calibration error, temperature variation (–40 to +85 °C), supply voltage change, load variation, mechanical shock/vibration, and 10-year aging at 40 °C - verified per Skyworks Rev. 1.4 datasheet Table 2.

Does the 511ECB-CBAG include runt suppression, and how does it function?

Yes, the 511ECB-CBAG incorporates hardware-level runt suppression on both power-on and OE transitions. When OE is asserted or the device powers up, internal circuitry holds CLK+/CLK− in a high-impedance or DC-biased state until the DSPLL achieves lock and output waveform integrity is confirmed - preventing sub-cycle glitches that could corrupt synchronous logic states.

What is the phase jitter performance of the 511ECB-CBAG at 156.25 MHz?

At 156.25 MHz output, the 511ECB-CBAG achieves 0.31 ps RMS phase jitter over the 1.875–20 MHz integration bandwidth (brickwall filter), and 0.8 ps RMS over 12 kHz–20 MHz - measured under 2.5/3.3 V supply conditions per Table 4 of the official datasheet. This performance exceeds PCIe Gen4 and 25G Ethernet jitter requirements.

How is the output enable (OE) pin implemented on the 511ECB-CBAG?

The 511ECB-CBAG implements OE on Pin 1 as an active-high control with an internal 45 kΩ pull-up resistor. When OE = VIH (≥0.80 × VDD), the LVPECL outputs are enabled; when OE = VIL (≤0.20 × VDD), outputs enter high-impedance state with runt suppression active. No external pull-up is required.

511ECB-CBAG Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Package/Case:: 6-SMD, No Lead

Series:: Si511

Packaging:: Strip

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Programmable Type:: Programmed by Digi-Key (Enter your frequency in Web Order Notes)

Available Frequency Range:: 170 MHz ~ 250 MHz

Function:: Enable/Disable

Output:: LVPECL

Voltage - Supply:: 2.5V

Frequency Stability:: ±20ppm

Frequency Stability (Total):: ±30ppm

Operating Temperature:: -40°C ~ 85°C

Spread Spectrum Bandwidth:: -

Current - Supply (Max):: 43mA

Ratings:: -

Mounting Type:: Surface Mount

Supplier Device Package:: -

Size / Dimension:: 0.197" L x 0.126" W (5.00mm x 3.20mm)

Height - Seated (Max):: 0.050" (1.28mm)

511ECB-CBAG FAQ

1.How can I place an order for 511ECB-CBAG through Aetrix?

Please submit a Request for Quotation (RFQ) for 511ECB-CBAG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 511ECB-CBAG reliable?

The price and inventory of 511ECB-CBAG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 511ECB-CBAG is usually 5 days.

3.What payment methods are accepted for 511ECB-CBAG?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 511ECB-CBAG transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 511ECB-CBAG?

511ECB-CBAG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 511ECB-CBAG order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 511ECB-CBAG?

For technical support, including 511ECB-CBAG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 511ECB-CBAG requirements.

6.How does Aetrix verify that 511ECB-CBAG is sourced from the original manufacturer or authorized distributors?

All 511ECB-CBAG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 511ECB-CBAG meets industry standards.

7.What is the process for return or replacement of 511ECB-CBAG?

All 511ECB-CBAG units undergo pre-shipment inspection (PSI). If there is an issue with 511ECB-CBAG, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 511ECB-CBAG part is unused and in its original packaging.

Return procedure for 511ECB-CBAG:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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