Nexperia USA Inc. 74AUP1G373GM,115

Overview

74AUP1G373GM,115 from Nexperia is a single-channel low-power D-type transparent latch with 3-state output, designed for voltage-level agnostic data latching in space-constrained digital systems. It operates across 0.8 V to 3.6 V supply, features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and delivers propagation delay as low as 1.2 ns at 3.3 V (CL = 5 pF). It is used in portable sensor interfaces where ultra-low static current (<0.9 μA max) and rail-to-rail input tolerance are critical.

For engineers reviewing the 74AUP1G373GM,115 datasheet, 74AUP1G373GM,115 pinout, 74AUP1G373GM,115 application, or 74AUP1G373GM,115 equivalent, key selection criteria include its 6-terminal XSON6 (SOT886) package, latch enable (LE) and output enable (OE) timing behavior, guaranteed operation from –40 °C to +125 °C, and compatibility with mixed-voltage I/O domains in battery-powered microcontrollers.

Technical Context

This device implements a single D-type transparent latch with independent LE (active-HIGH) and OE (active-LOW) controls, enabling precise data capture and bus isolation. Its Schmitt-trigger inputs tolerate slow-rising signals and reject noise up to ±10 % of VCC overshoot/undershoot.

The IOFF circuit ensures sub-0.75 μA power-off leakage when VCC = 0 V, preventing backflow current during partial system shutdown. All DC and AC specifications-including VIH/VIL thresholds, tpd (1.2–4.2 ns), tsu/th (±0.1–0.7 ns), and CPD (2.0–2.8 pF)-are fully characterized across –40 °C to +125 °C and the full 0.8–3.6 V VCC range.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 × 1.45 × 0.5 mm; wettable flank terminals for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar D-type transparent latch applications.

Compared with SN74LVC1G373DBVR and 74LVC1G74GW,125, the 74AUP1G373GM,115 uniquely combines ultra-low ICC, IOFF, Schmitt inputs, and true transparent latching-making it optimal for battery-critical, mixed-voltage, and hot-swap-sensitive applications where deterministic data capture and zero-backflow are mandatory.

Availability

74AUP1G373GM,115 is available at Aetrix Electronics and suitable for automotive body electronics, industrial sensor hubs, wearable health monitors, and smart meter front-ends requiring stable component supply across extended temperature ranges and ultra-low power budgets.

Supply support for 74AUP1G373GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable components for automotive, industrial, and consumer markets, with leadership in logic, MOSFETs, and ESD protection.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power, high-noise-immunity digital signal conditioning in space- and energy-constrained applications such as wearables, IoT sensors, and automotive sub-systems.

FAQ

What is the minimum VCC required for guaranteed operation?

The 74AUP1G373GM,115 is fully specified down to 0.8 V VCC, with VIH/VIL thresholds scaled proportionally (e.g., VIH ≥ 0.70×VCC at 0.8 V). All AC parameters-including tpd, tsu, and th-are guaranteed across this range, enabling use in energy-harvesting systems powered by single-cell batteries or RF harvesters.

Can OE and LE be tied together for simplified control?

No-LE is active-HIGH and OE is active-LOW, so tying them directly would prevent simultaneous enablement of latching and output drive. To simplify control, an inverter may be added between LE and OE, or a dedicated GPIO can drive OE independently to manage bus release timing after latching.

Does the device support hot-plug operation when VCC is unpowered?

Yes-the IOFF circuit actively disables outputs and limits leakage to ±0.75 μA when VCC = 0 V, even with VI or VO biased up to 3.6 V. This prevents damaging backflow current into a powered-down system, satisfying JEDEC JESD78 Class II Level B latch-up immunity requirements.

How does Schmitt-trigger input action improve system reliability?

Schmitt-trigger inputs provide hysteresis (typically ≥0.3×VCC), rejecting noise spikes and slow-rising/falling signals that could cause metastability or multiple toggles. This eliminates need for external RC filtering on noisy switch or sensor lines, reducing BOM cost and PCB area in automotive and industrial control applications.