Nexperia USA Inc. 74AUP1G373GM,132

Overview

74AUP1G373GM,132 from Nexperia is a single-channel low-power D-type transparent latch with 3-state output and Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply. It features latch enable (LE) and output enable (OE) control, IOFF partial power-down protection, and supports -40 °C to +125 °C operation in the XSON6 (SOT886) package. Used for data latching and bus isolation in ultra-low-power sensor interfaces and portable microcontroller peripherals.

For engineers reviewing the 74AUP1G373GM,132 datasheet, 74AUP1G373GM,132 pinout, 74AUP1G373GM,132 application, or 74AUP1G373GM,132 equivalent, key selection criteria include its sub-1 μA ICC max at 3.6 V, IOFF leakage < ±0.75 μA during power-down, 3.3 ns tpd at 3.0 V/CL=5 pF, Schmitt-trigger noise immunity, and compatibility with 1.2 V, 1.8 V, and 3.3 V logic domains.

Technical Context

This device implements a transparent latch architecture where Q follows D when LE is HIGH, and holds the last value when LE transitions LOW. The separate active-LOW OE input controls output state independently, enabling high-impedance tri-state operation without affecting internal latch state.

IOFF circuitry disables both output drivers when VCC = 0 V, blocking backflow current even if I/O pins are driven externally. Schmitt-trigger inputs provide hysteresis (typically 0.3 × VCC), tolerating slow-rising signals and improving noise margin in noisy environments.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; wettable flank terminals for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar D-type transparent latch applications.

Compared with SN74LVC1G373DBVR and 74AUP1G74GW,125, the 74AUP1G373GM,132 uniquely combines sub-μA static current, true transparent latching, and IOFF-enabled partial power-down-making it the sole option for energy-constrained, mixed-voltage, and hot-swap-capable designs.

Availability

74AUP1G373GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable MCU peripheral buses, automotive body control modules, and IoT edge node data aggregation requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G373GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components for automotive, industrial, and consumer markets.

The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and thermally constrained applications, delivering nanowatt static power and robust noise immunity without sacrificing speed or voltage flexibility.

FAQ

What is the minimum supply voltage for reliable operation of the 74AUP1G373GM,132?

The device is fully specified down to 0.8 V, with guaranteed VIH/VIL thresholds, propagation delay, and IOFF functionality across the entire range. At 0.8 V, tPD is 21.4 ns (CL = 5 pF), and ICC remains ≤ 0.9 μA - enabling use in single-cell LiFePO₄ (2.5–3.6 V) or multi-cell alkaline (0.9–1.5 V) systems with buck-boost regulation.

How does the IOFF feature protect the device during partial power-down?

When VCC = 0 V, the IOFF circuit disables both output drivers, limiting leakage current to ±0.75 μA regardless of voltage applied to D, Q, LE, or OE pins. This prevents reverse current flow that could damage upstream drivers or disrupt powered subsystems - critical for hot-pluggable modules and fail-safe shutdown sequences.

Can the 74AUP1G373GM,132 drive a 50 pF load reliably?

No - the datasheet specifies dynamic performance only up to CL = 30 pF. At 30 pF and VCC = 3.0 V, tPD increases to 6.1 ns (max). Driving 50 pF would exceed design limits, causing excessive rise/fall times, increased dynamic power, and potential setup/hold violations in downstream receivers.

Is the Schmitt-trigger input hysteresis fixed or voltage-dependent?

Hysteresis is proportional to VCC: typical ΔV = 0.3 × VCC, with guaranteed minimums across temperature. At VCC = 1.8 V, hysteresis is ~0.54 V; at VCC = 3.3 V, it is ~0.99 V. This scaling maintains consistent noise margin across the full supply range without external resistor networks.