Nexperia USA Inc. 74HC373D,652

Overview

74HC373D,652 from Nexperia is an octal D-type transparent latch with 3-state outputs, used for bus interface and data hold in microcontroller peripheral expansion, memory address latching, and I/O port buffering. It operates from 2.0 V to 6.0 V, features active-HIGH latch enable (LE) and active-LOW output enable (OE), and is specified over -40 °C to +125 °C in SO20 package.

For engineers reviewing the 74HC373D,652 datasheet, 74HC373D,652 pinout, 74HC373D,652 application, or 74HC373D,652 equivalent, this device is selected for bidirectional bus isolation, synchronous data capture in 8-bit systems, and TTL/CMOS-level compatible latch control where low power and high noise immunity are required.

Technical Context

The 74HC373D,652 implements eight independent D-type latches with shared LE and OE controls. Its transparent mode allows real-time D-to-Q propagation while LE is HIGH; a HIGH-to-LOW LE transition captures and holds input states. OE independently places all Q outputs in high-impedance state without affecting internal latch values.

Input clamp diodes enable safe interfacing to voltages exceeding VCC when current-limiting resistors are used. The device complies with JEDEC JESD7A (2.0–6.0 V) and JESD8C (2.7–3.6 V), supports CMOS-level inputs, and delivers typical propagation delay of 15 ns at VCC = 4.5 V and CL = 50 pF.

Key Specifications

Pinout & Package

74HC373D,652 is housed in a plastic small outline package (SO20, SOT163-1) with 20 leads, 7.5 mm body width, and gull-wing surface-mount terminals. Pin 1 is marked by a notch or index area on the package top.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar octal transparent latch applications.

Compared with 74HCT373D,652, the 74HC373D,652 offers lower input threshold sensitivity and wider VCC margin, while SN74HC373N trades surface-mount efficiency for mechanical robustness and hand-soldering compatibility - selection depends on interface voltage source and assembly method.

Availability

74HC373D,652 is available at Aetrix Electronics and suitable for microcontroller bus expansion, memory address latching, and industrial I/O port buffering requiring stable component supply across automotive-adjacent, industrial control, and embedded computing programs.

Supply support for 74HC373D,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential semiconductors, delivering high-performance, reliable components for automotive, industrial, and consumer applications.

The 74HC373D,652 belongs to Nexperia's 74HC logic family - designed for low-power, high-noise-immunity digital interfacing in space-constrained and thermally demanding embedded systems.

FAQ

What is the maximum clock frequency supported by the 74HC373D,652?

The 74HC373D,652 is not a clocked register but a transparent latch: its effective data rate depends on LE pulse width and propagation delay. With tW(min) = 14 ns at VCC = 6.0 V and tpd(max) = 38 ns at VCC = 4.5 V, it supports reliable operation up to approximately 10 MHz in systems where LE is strobed at that rate. No internal clock circuitry exists.

Can the 74HC373D,652 drive LEDs directly?

Yes - each Q output can sink or source up to ±7.8 mA at VCC = 4.5 V, sufficient to drive standard 2 mA–5 mA indicator LEDs with appropriate current-limiting resistors. For higher-current loads (e.g., >10 mA), external transistors or dedicated drivers are required.

Is the 74HC373D,652 pin-compatible with the 74LS373?

No - although both are octal transparent latches with 3-state outputs, the 74LS373 uses TTL logic levels (VIH ≈ 2.0 V, VIL ≈ 0.8 V) and draws significantly higher supply current (ICC ≈ 30 mA). The 74HC373D,652 has CMOS inputs (VIH = 3.15 V min at 4.5 V) and ICC < 160 μA, requiring level adaptation for direct replacement.

Does the 74HC373D,652 require external pull-up or pull-down resistors on OE or LE?

No - OE and LE are active-driven CMOS inputs with negligible leakage (<±0.1 μA). However, in floating-input scenarios (e.g., unused OE), a pull-down resistor (10–100 kΩ to GND) is recommended to prevent undefined output states and reduce EMI susceptibility during power-up or reset.