Nexperia USA Inc. 74HCT373BQ-Q100,11

Overview

74HCT373BQ-Q100 from Nexperia is an automotive-grade octal D-type transparent latch with 3-state outputs, designed for bus-oriented data latching in vehicle control modules. It features TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max at VCC = 4.5–5.5 V), operates from -40 °C to +125 °C, and delivers 6.0 mA output drive at 4.5 V while consuming only 8 μA typical ICC. Used in engine control unit (ECU) address/data bus isolation.

For engineers reviewing the 74HCT373BQ-Q100 datasheet, 74HCT373BQ-Q100 pinout, 74HCT373BQ-Q100 application, or 74HCT373BQ-Q100 equivalent, key selection criteria include latch enable timing (tsu = 12 ns, th = 4 ns at VCC = 4.5 V), 3-state disable time (tdis = 38 ns), automotive AEC-Q100 Grade 1 qualification, and DHVQFN20 package compatibility with AOI-enabled solder joint inspection.

Technical Context

This device implements eight independent D-type latches with a shared active-HIGH latch enable (LE) and active-LOW 3-state output enable (OE). Latch transparency occurs when LE is HIGH, allowing real-time D-to-Q propagation; data is captured on the HIGH-to-LOW LE transition with 12 ns setup and 4 ns hold time at 4.5 V.

The 3-state outputs support bidirectional bus sharing without contention, and OE operation is fully independent of latch state-enabling output disabling without altering stored data. Input clamp diodes permit safe interfacing to voltages exceeding VCC when used with current-limiting resistors.

Key Specifications

Pinout & Package

DHVQFN20 package (SOT764-1): 2.5 × 4.5 × 0.85 mm body, side-wettable flanks for automated optical inspection, no leads, 20-terminal quad flat construction with exposed thermal pad (non-soldered by default).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar octal transparent latch applications.

Compared with 74HCT373PW-Q100, the BQ variant offers superior manufacturability via AOI-ready side-wettable flanks; versus SN74HCT373QPWRQ1, it provides guaranteed pinout compatibility across Nexperia's Q100 portfolio and tighter 3-state timing (38 ns vs 45 ns tdis).

Availability

74HCT373BQ-Q100 is available at Aetrix Electronics and suitable for automotive engine control units, body control modules, instrument clusters, and ADAS camera interfaces requiring stable component supply across extended temperature ranges and full AEC-Q100 compliance.

Supply support for 74HCT373BQ-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions optimized for automotive, industrial, and mobile applications.

The 74HCT373BQ-Q100 belongs to Nexperia's automotive-qualified logic family, engineered specifically for robust bus interfacing in harsh-temperature vehicle subsystems where reliability, timing precision, and manufacturing traceability are mandatory.

FAQ

What is the maximum clock frequency supported by the 74HCT373BQ-Q100 in transparent mode?

The device does not operate on a clock signal but functions as a level-sensitive latch. In transparent mode (LE = HIGH), its usable data rate is limited by propagation delay (17 ns typ D→Q at 4.5 V) and setup/hold timing. For reliable operation with 50 pF load, maximum toggle rate is ~25 MHz, assuming ≥12 ns setup and ≥4 ns hold margins per data edge.

Can the thermal pad on the DHVQFN20 package be soldered to ground?

Yes-the exposed pad (pin 1 index area) may be left floating or connected to GND per design needs. If soldered, the land must remain electrically isolated from other layers unless explicitly tied to GND; doing so improves thermal resistance by ~15 °C/W but requires careful PCB stackup planning to avoid shorting adjacent terminals.

How does the 74HCT373BQ-Q100 differ from the 74HC373BQ-Q100 in system integration?

The HCT version uses TTL-compatible input thresholds (VIH = 2.0 V, VIL = 0.8 V), enabling direct connection to 5 V microcontrollers without level shifters. The HC version requires CMOS thresholds (VIH = 3.15 V at 4.5 V), making it incompatible with legacy 5 V TTL outputs and necessitating additional buffering in mixed-voltage systems.

Is the 74HCT373BQ-Q100 susceptible to latch-up under transient conditions?

No-it is qualified to JESD78 Class II Level B with latch-up immunity exceeding 100 mA, verified across -40 °C to +125 °C. This withstands ISO 7637-2 pulse 5a (12 V surge) and ESD events (HBM >2000 V, CDM >1000 V), ensuring robustness in automotive environments with high electromagnetic interference.