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Nexperia USA Inc. 74LVC373ABQ,115
- Part No.:
- 74LVC373ABQ,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Latches
- Package:
- 20-VFQFN Exposed Pad
- Datasheet:
-
74LVC373ABQ,115.pdf
- Description:
- IC D-TYPE TRANSP SGL 8:8 20HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:441
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Product details
Overview
74LVC373ABQ,115 from Nexperia is an octal D-type transparent latch with 3-state outputs, latch enable (LE) and output enable (OE) controls, 1.2 V to 3.6 V supply operation, 5 V tolerant I/O, and Schmitt-trigger inputs for noise immunity in mixed-voltage digital systems. It serves as a data latching and level-shifting interface between 3.3 V logic and legacy 5 V peripherals in industrial control backplanes.
For engineers reviewing the 74LVC373ABQ,115 datasheet, 74LVC373ABQ,115 pinout, 74LVC373ABQ,115 application, or 74LVC373ABQ,115 equivalent, key selection criteria include its 5 V tolerant I/O capability, IOFF partial power-down protection, -40 °C to +125 °C operating range, and DHVQFN20 thermal-enhanced package for high-density PCB layouts.
Technical Context
The device implements eight independent D-type latches with transparent mode when LE is HIGH and edge-triggered capture on LE HIGH-to-LOW transition. Its dual enable architecture separates data capture (LE) from output drive control (OE), enabling independent timing management of bus loading and data staging.
Schmitt-trigger inputs ensure robust signal integrity with slow-rising signals, while the IOFF circuit actively disables outputs during VCC = 0 V to prevent backflow current-critical for hot-swap and power sequencing in modular systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.2 V to 3.6 V - supports low-power battery-operated and mixed-supply systems without level shifters |
| I/O Voltage Tolerance | Up to 5.5 V - enables direct interfacing with 5 V TTL/CMOS devices without external clamping |
| Propagation Delay (D→Q) | 1.5 ns to 8.5 ns at VCC = 3.0–3.6 V - ensures sub-10 ns timing margin for 100 MHz bus handshaking |
| IOFF Leakage | ±10 μA max at VCC = 0 V - guarantees safe isolation during partial power-down sequences |
| Operating Temperature | -40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drives |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - meets IEC 61000-4-2 Level 3 for board-level reliability |
| Power Dissipation | 500 mW max (SOT764-1) - enabled by DHVQFN20 thermal pad for sustained 24/7 operation |
Pinout & Package
DHVQFN20 package (SOT764-1): 2.5 × 4.5 × 0.85 mm body, 20-terminal no-lead quad flat design with exposed thermal pad; optimized for thermal performance and high-density routing in space-constrained applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Reference ground for all I/O and internal logic; must be connected to PCB ground plane |
| 2–9, 12–19 | D0–D7 / Q0–Q7 | Eight bidirectional data lanes: Dn inputs feed latches; Qn outputs reflect stored state or high-Z per OE |
| 10 | LE | Latch Enable (active HIGH) - controls transparency vs. storage mode; synchronous edge capture on HIGH→LOW |
| 11 | OE | Output Enable (active LOW) - independently gates all Qn outputs into high-impedance state without affecting latch contents |
| 20 | VCC | Core supply rail (1.2–3.6 V); requires local 100 nF decoupling adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| 5 V tolerant I/O | Supports direct connection to 5 V buses without external voltage translators or resistive dividers |
| IOFF partial power-down | Prevents damaging back-current flow when VCC is off but I/O lines remain energized (e.g., hot-swap cards) |
| Schmitt-trigger inputs | Provides ≥0.3 V hysteresis to reject noise on slow-rising control signals like reset or enable lines |
| JEDEC-compliant voltage ranges | Fully specified across JESD8-7A (1.65–1.95 V), JESD8-5A (2.3–2.7 V), and JESD8-C (2.7–3.6 V) |
| Wide temperature grade | Validated from -40 °C to +125 °C - suitable for engine control units and industrial PLCs |
Applications
| Industrial Bus Interface | Microcontroller GPIO Expansion |
|---|---|
Use Scenario: Interfacing a 3.3 V ARM Cortex-M4 microcontroller to legacy 5 V RS-485 transceivers and sensor nodes on a factory floor CAN backbone. IC Role / Device Role / Timing Role: Acts as a bidirectional level-shifting latch, capturing MCU data before driving 5 V bus lines while isolating voltage domains. Use Value: Eliminates need for discrete level shifters and reduces BOM count by 4 components per bus segment. | Use Scenario: Expanding GPIO count on a compact IoT gateway using an ESP32-WROVER module with limited native I/O. IC Role / Device Role / Timing Role: Provides eight additional latched outputs controlled via parallel write, synchronized by LE and tri-stated via OE for shared bus arbitration. Use Value: Enables deterministic output state retention during MCU sleep cycles without software polling overhead. |
| Automotive Body Control Module | Test Equipment Signal Conditioning |
Use Scenario: Driving 5 V solenoid drivers and LED indicators from a 3.3 V automotive MCU in a door module with strict EMC requirements. IC Role / Device Role / Timing Role: Latches command signals from the MCU and presents them to 5 V loads with Schmitt-trigger noise rejection on enable lines. Use Value: Meets ISO 11452-4 pulse injection immunity due to input hysteresis and IOFF protection during ignition transients. | Use Scenario: Isolating and buffering digital stimulus patterns from a 3.3 V pattern generator to 5 V DUT inputs in automated test equipment. IC Role / Device Role / Timing Role: Captures test vectors synchronously, holds stable outputs during DUT evaluation, then tri-states to disconnect after measurement. Use Value: Prevents signal contention during test reconfiguration and ensures repeatable 1.5 ns propagation delay across all channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal transparent latch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC373APWR | TSSOP20 package (SOT360-1); 4.4 mm body width; 10.0 mW/K thermal derating above 100 °C | Lower thermal performance than DHVQFN20; suited for lower ambient or intermittent duty cycles | Select when board space allows larger footprint and thermal budget permits higher junction temperature rise |
| 74LVC373APW,118 | Same TSSOP20 package; identical electrical specs; different reel packaging and traceability marking | No functional difference; used interchangeably where logistics or lot traceability requirements differ | Choose based on distributor availability and manufacturing line traceability needs, not performance |
Compared with SN74LVC373APWR and 74LVC373APW,118, the 74LVC373ABQ,115 delivers superior thermal resistance (12.9 mW/K derating above 111 °C) and smaller footprint (2.5 × 4.5 mm vs. 4.4 × 6.6 mm), making it optimal for thermally constrained, high-reliability embedded modules.
Availability
74LVC373ABQ,115 is available at Aetrix Electronics and suitable for industrial automation interfaces, automotive body electronics, and test equipment signal conditioning requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74LVC373ABQ,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74LVC373A series belongs to Nexperia's advanced LVC logic family, designed specifically for robust, low-voltage, mixed-signal interfacing in harsh environments with stringent power and thermal constraints.
FAQ
What is the maximum clock frequency supported by the 74LVC373ABQ,115?
The 74LVC373ABQ,115 does not operate on a clock signal-it is a transparent latch controlled by level-sensitive LE and OE inputs. Its usable data rate is determined by propagation delay (as low as 1.5 ns) and setup/hold times (2.0 ns su / 1.5 ns h at 3.3 V), supporting reliable operation up to approximately 100 MHz in well-designed bus systems with proper signal integrity.
Can the 74LVC373ABQ,115 be used with a 1.2 V supply and 5 V inputs simultaneously?
Yes. The device is fully specified for VCC = 1.2 V to 3.6 V and accepts input voltages up to 5.5 V regardless of supply level. At 1.2 V VCC, VIH is guaranteed at 1.08 V and VIL at 0.12 V, while 5 V inputs are safely clamped internally-enabling true 1.2 V core logic interfacing with legacy 5 V peripherals.
How does the IOFF feature protect the device during power sequencing?
When VCC = 0 V, the IOFF circuit disables all outputs and presents high-impedance terminals-even if 5 V signals remain present on Dn or Qn pins. This prevents reverse current flow from powered I/O lines into the unpowered VCC rail, eliminating risk of latch-up or damage during hot-plug events or staggered power-up sequences in multi-rail systems.
Is the DHVQFN20 package (SOT764-1) lead-free and RoHS compliant?
Yes. The 74LVC373ABQ,115 in SOT764-1 package is manufactured using lead-free solderable terminations and complies with EU RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006. The package uses standard SnAgCu (SAC305) finish and is compatible with IPC-J-STD-020D moisture sensitivity level 1 (MSL1) reflow profiles.
74LVC373ABQ,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LVC
- Package/Case:
- 20-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- D-Type Transparent Latch
- Circuit:
- 8:8
- Output Type:
- Tri-State
- Voltage - Supply:
- 1.2V ~ 3.6V
- Independent Circuits:
- 1
- Delay Time - Propagation:
- 1.5ns
- Current - Output High, Low:
- 24mA, 24mA
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-DHVQFN (4.5x2.5)
74LVC373ABQ,115 FAQ
1.How can I place an order for 74LVC373ABQ,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC373ABQ,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC373ABQ,115 reliable?
The price and inventory of 74LVC373ABQ,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC373ABQ,115 is usually 5 days.
3.What payment methods are accepted for 74LVC373ABQ,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC373ABQ,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC373ABQ,115?
74LVC373ABQ,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC373ABQ,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC373ABQ,115?
For technical support, including 74LVC373ABQ,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC373ABQ,115 requirements.
6.How does Aetrix verify that 74LVC373ABQ,115 is sourced from the original manufacturer or authorized distributors?
All 74LVC373ABQ,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC373ABQ,115 meets industry standards.
7.What is the process for return or replacement of 74LVC373ABQ,115?
All 74LVC373ABQ,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC373ABQ,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC373ABQ,115 part is unused and in its original packaging.
Return procedure for 74LVC373ABQ,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LVC373ABQ,115 Tags
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