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Home > Products > Integrated Circuits (ICs) > Logic > Latches

Diodes Incorporated 74LVC573AT20-13

Name: 74LVC573AT20-13
Brand: Diodes Incorporated
SKU: 74LVC573AT20-13
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74LVC573AT20-13

Manufacturer:: Diodes Incorporated

Category:: Latches

Package:: 20-TSSOP (0.173", 4.40mm Width)

Datasheet:: 74LVC573AT20-13.pdf

Description:: IC D-TYPE TRANSP SGL 8:8 20TSSOP

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Product details

Overview

74LVC573AT20-13 from Diodes Incorporated is an octal transparent D-type latch with 3-state outputs in TSSOP-20 package, operating from 1.65V to 3.6V supply, supporting 5.5V-tolerant inputs and ±24mA output drive at V_CC = 3.0V, used for bus driving and signal isolation in notebook and peripheral subsystems.

For engineers reviewing the 74LVC573AT20-13 datasheet, 74LVC573AT20-13 pinout, 74LVC573AT20-13 application, or 74LVC573AT20-13 equivalent, key selection criteria include latch-enable timing (t_SU = 2.0 ns min at 3.3V), 3-state disable time (t_DIS = 7.5 ns typ), IOFF-enabled partial power-down capability, and mixed-voltage interface compatibility.

Technical Context

This device implements eight independent D-type latches with synchronous enable control via LE and independent 3-state output control via OE - OE does not affect internal latch state retention. Each latch follows D input when LE is high and holds Q output when LE transitions low.

It features Schmitt-trigger inputs for noise immunity, IOFF circuitry that disables outputs during power-down to prevent backflow current, and 5.5V-tolerant inputs enabling direct interfacing with 5V logic while powered from 1.8V/2.5V/3.3V supplies.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	1.65V to 3.6V - supports low-power portable designs and mixed-voltage system integration
Input Voltage Tolerance	Up to 5.5V - enables direct connection to 5V buses without level shifters
Output Drive Strength	±24mA at V_CC = 3.0V - sufficient to drive standard 50Ω transmission lines or multiple CMOS loads
t_PD (D→Q)	3.8 ns typ at 3.3V - ensures fast data capture in high-speed bus applications
t_EN/t_DIS	4.1 ns typ enable/disable time at 3.3V - minimizes bus contention during output state transitions
IOFF Leakage	±10 μA max - prevents damaging current flow during partial power-down sequences
ESD Protection	2 kV HBM, 1 kV CDM - meets industrial I/O robustness requirements

Pinout & Package

TSSOP-20 package: 6.4 mm × 6.5 mm × 1.2 mm body, 0.65 mm lead pitch, exposed pad not present, JEDEC-standard footprint per AP02001.

Pin/Terminal	Circuit Role	Design Meaning
1	OE	Active-low 3-state output enable - controls all eight Q outputs simultaneously without affecting latch state
2–9	D1–D8	Data inputs - sampled on LE high; tolerant to 5.5V regardless of V_CC
10	GND	Ground reference - must be connected to system ground plane for noise immunity and thermal dissipation
11	LE	Latch-enable - high enables transparency; low captures and holds D-input values at Q outputs
12–19	Q8–Q1	Tri-stateable latch outputs - driven high/low or placed in high-Z; outputs retain state during OE assertion
20	V_CC	Power supply - operates from 1.65V to 3.6V; powers internal logic and output drivers

Key Features

Feature	Design Value
IOFF Partial Power-Down Support	Prevents back-current flow when V_CC = 0V, enabling safe hot-insertion and power sequencing
5.5V-Tolerant Inputs	Allows direct interface with legacy 5V logic without external level translators in mixed-supply systems
Schmitt-Trigger Inputs	Provides >0.5V hysteresis for reliable operation with slow or noisy input signals
Low Dynamic Ground Bounce	VOLP < 0.8V at V_CC = 3.3V - reduces switching noise coupling into shared ground paths
High-Z Output Isolation	IOZ ≤ ±5 μA at 3.6V - ensures minimal bus loading during tri-state, critical for shared data bus integrity

Applications

PC Notebook Memory Bus Interface

Industrial PLC I/O Expansion Module

Use Scenario: Latching address/data signals between CPU and DDR memory controller in space-constrained ultrabook designs.

IC Role / Device Role / Timing Role: Octal latch buffers parallel bus segments during memory arbitration cycles, isolating active and idle sections.

Use Value: Enables clean bus turnaround with t_DIS = 7.5 ns and eliminates need for external pull-ups due to strong 24mA drive.

Use Scenario: Isolating microcontroller GPIOs from relay driver banks in modular PLC backplanes.

IC Role / Device Role / Timing Role: Provides galvanically isolated signal staging between low-voltage logic and 24V field-side circuits via OE-controlled high-Z state.

Use Value: IOFF protection prevents backfeed damage during module hot-swap; 5.5V tolerance accommodates sensor input variations.

USB 3.0 Hub Controller Signal Conditioning

Automotive Infotainment Display Interface

Use Scenario: Level-shifting and bus buffering between 1.8V USB PHY and 3.3V hub controller logic.

IC Role / Device Role / Timing Role: Transparent latch synchronizes asynchronous control signals (e.g., reset, suspend) across voltage domains.

Use Value: Schmitt-trigger inputs suppress EMI-induced glitches on long PCB traces; t_SU = 2.0 ns ensures setup compliance at 125 MHz timing margins.

Use Scenario: Driving segmented LCD column drivers from a low-power MCU in automotive dashboard displays.

IC Role / Device Role / Timing Role: Latches display data under LE control while OE manages bus sharing with touch controller interface.

Use Value: -40°C to +125°C operating range meets AEC-Q100 ambient requirements; low ICC = 10 μA supports always-on display standby mode.

Equivalent & Alternatives

The following parts are listed as comparable options for similar octal transparent latch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC573APW	Same logic function and pinout; TI version with slightly higher t_PD (4.5 ns typ vs. 3.8 ns) and no IOFF support	Lacks IOFF - unsuitable for partial power-down systems requiring back-current blocking	Select only if IOFF is not required and TI supply chain preference applies
74AHC573PW	Higher V_CC range (2V–5.5V); 5V-only input tolerance; no 5.5V tolerance or IOFF	Cannot interface directly with 5V signals while powered at 1.8V; incompatible with mixed-voltage sequencing	Choose only for pure 5V systems where 5.5V tolerance and IOFF are unnecessary

Compared with SN74LVC573APW and 74AHC573PW, the 74LVC573AT20-13 uniquely combines 5.5V input tolerance, IOFF, and sub-4ns propagation delay - making it optimal for compact, multi-rail embedded systems requiring bus integrity and power sequencing safety.

Availability

74LVC573AT20-13 is available at Aetrix Electronics and suitable for notebook motherboard design, industrial I/O expansion, and automotive display interface applications requiring stable component supply and full RoHS/Green compliance.

Supply support for 74LVC573AT20-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient components for computing, industrial, and automotive markets.

The 74LVC573A belongs to Diodes' LVC logic family - designed specifically for low-voltage, mixed-signal interfacing in space-constrained portable and embedded systems with stringent power and noise requirements.

FAQ

What is the maximum clock frequency supported by the 74LVC573AT20-13?

The 74LVC573AT20-13 is not a clocked register but a transparent latch: its speed is defined by propagation delay (t_PD = 3.8 ns typ at 3.3V) and setup/hold times (t_SU = 2.0 ns, t_H = 1.5 ns). It supports data rates up to ~200 MHz in latch-mode bus applications, limited by board layout and load capacitance-not by internal clocking.

Can the 74LVC573AT20-13 be used with a 5V microcontroller driving its D inputs while V_CC = 2.5V?

Yes - all inputs are rated for 0V to 5.5V regardless of V_CC, verified per datasheet Section 6 (Recommended Operating Conditions). This allows direct connection to 5V MCUs without level shifters, provided V_CC remains within 1.65V–3.6V and output loads respect 2.5V logic thresholds.

Does the 74LVC573AT20-13 support hot insertion or live board swapping?

Yes - the integrated IOFF circuit disables outputs when V_CC = 0V, limiting back-current to ±10 μA max. This satisfies hot-swap requirements per JESD78 Class I latch-up immunity (>250 mA) and prevents damage to powered-backplane circuits during module insertion/removal.

How does the Schmitt-trigger input improve noise immunity in this latch?

Schmitt-trigger inputs provide ≥0.5V hysteresis (typical), meaning the rising and falling input thresholds differ significantly - e.g., VIH ≈ 2.0V and VIL ≈ 0.8V at V_CC = 3.3V. This rejects transient noise spikes <0.5V amplitude and ensures clean LE/D transitions even on long, unterminated PCB traces.

74LVC573AT20-13 Specifications

Product attributes: Attribute value

Manufacturer:: Diodes Incorporated

Series:: 74LVC

Package/Case:: 20-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Logic Type:: D-Type Transparent Latch

Circuit:: 8:8

Output Type:: Tri-State

Voltage - Supply:: 1.65V ~ 3.6V

Independent Circuits:: 1

Delay Time - Propagation:: 4.4ns

Current - Output High, Low:: 24mA, 24mA

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 20-TSSOP

74LVC573AT20-13 FAQ

1.How can I place an order for 74LVC573AT20-13 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74LVC573AT20-13 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74LVC573AT20-13 reliable?

The price and inventory of 74LVC573AT20-13 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC573AT20-13 is usually 5 days.

3.What payment methods are accepted for 74LVC573AT20-13?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC573AT20-13 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74LVC573AT20-13?

74LVC573AT20-13 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74LVC573AT20-13 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74LVC573AT20-13?

For technical support, including 74LVC573AT20-13 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC573AT20-13 requirements.

6.How does Aetrix verify that 74LVC573AT20-13 is sourced from the original manufacturer or authorized distributors?

All 74LVC573AT20-13 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC573AT20-13 meets industry standards.

7.What is the process for return or replacement of 74LVC573AT20-13?

All 74LVC573AT20-13 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC573AT20-13, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74LVC573AT20-13 part is unused and in its original packaging.

Return procedure for 74LVC573AT20-13:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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