Allegro MicroSystems A4919GLPTR-T
- Part No.:
- A4919GLPTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Gate Drivers
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A4919GLPTR-T.pdf
- Description:
- IC GATE DRVR HI/LOW SIDE 28TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,000
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Product details
Overview
A4919GLPTR-T from Allegro MicroSystems is a three-phase N-channel MOSFET gate driver IC designed for brushless DC (BLDC) motor control in battery-powered and industrial systems. It delivers regulated 13 V gate drive down to 7 V supply, supports 5.5–50 V input range, integrates crossover protection and phase short-circuit detection, and operates in a 28-pin TSSOP package with exposed thermal pad - enabling compact, high-current motor drives for power tools and CPAP machines.
For engineers reviewing the A4919GLPTR-T datasheet, A4919GLPTR-T pinout, A4919GLPTR-T application, or A4919GLPTR-T equivalent, this page provides verified technical context, validated pin functions, confirmed fault diagnostics behavior, real-world thermal resistance data (28 °C/W on 4-layer PCB), and two rigorously cross-checked alternative drivers for BLDC gate control.
Technical Context
The A4919GLPTR-T implements a charge-pump-based gate drive supply (VREG ≈13 V) that sustains full gate voltage (>10 V) at VBB ≥7 V and maintains functional operation down to VBB = 5.5 V with reduced drive. It uses six independent TTL-compatible logic inputs (AHI/ALO/BHI/BLO/CHI/CLO) to directly control high-side (GHA/GHB/GHC) and low-side (GLA/GLB/GLC) outputs without internal commutation logic.
Protection includes per-phase drain-source voltage monitoring via programmable VDSTH pin (0.2–2.0 V threshold range), integrated cross-conduction prevention, open-drain FAULT output signaling short-to-supply/short-to-ground, undervoltage (VBB <5.5 V), and overtemperature (>170 °C). Sleep mode is enabled only on non-LDO variants like A4919GLPTR-T, entering after 7.5–12.5 ms of simultaneous low logic on all six inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBB Supply Range | 5.5 V to 50 V - supports wide-input battery systems (e.g., 2S–12S Li-ion) and industrial 24/48 V rails. |
| VREG Output | 12.5–13.75 V at 15 mA - powers low-side drivers and charges bootstrap capacitors; enables >10 V gate drive for N-MOSFETs. |
| Gate Drive Strength | RDS(on)UP = 5–13 Ω (high-side), RDS(on)DN = 1.5–4.6 Ω (low-side) - ensures fast switching with <35 ns turn-on time into 1 nF load. |
| Fault Detection | Per-phase VDS monitoring with user-programmable threshold (0.2–2.0 V on VDSTH), plus VBB UVLO and TJ >170 °C warning - enables robust motor protection. |
| Sleep Current | ≤15 µA - reduces system standby power in portable equipment when all six control inputs are held low. |
| Thermal Resistance | RθJA = 28 °C/W (4-layer PCB) - requires minimal copper area for thermal management in TSSOP-LP package. |
| Logic Compatibility | TTL thresholds (VIH ≥2.0 V, VIL ≤0.8 V) - interoperable with 3.3 V and 5 V microcontrollers without level-shifting. |
Pinout & Package
Package: 28-pin TSSOP with exposed thermal pad (LP), 9.7 mm × 4.4 mm × 1.2 mm, Pb-free with 100% matte-tin leadframe plating.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| LSS (1) | Low-side source return | Common source node for all three low-side MOSFETs; connects to PCB ground plane via low-impedance trace. |
| GLC (2), GLB (6), GLA (10) | Low-side gate drive outputs | Drive gates of external N-MOSFETs referenced to LSS; each capable of 150 mA sink/source. |
| GHC (3), GHB (7), GHA (11) | High-side gate drive outputs | Drive gates of external N-MOSFETs referenced to respective SA/SB/SC; bootstrap-supplied, 150 mA sink capability. |
| SC (4), SB (8), SA (12) | Motor phase connections | Connect to motor windings; serve as floating return for bootstrap capacitors and VDS sensing nodes. |
| CC (5), CB (9), CA (13) | Bootstrap capacitor terminals | Each pair (Cx–Sx) forms bootstrap circuit for corresponding high-side driver; requires 100–470 nF ceramic cap. |
| VREG (14) | Regulated gate drive supply | 13 V output powering low-side drivers and charging bootstrap caps; requires ≥10 µF bulk capacitance. |
| CP2 (15), CP1 (16) | Charge pump capacitor terminals | Connect 470 nF capacitor between CP1–CP2 to enable boost regulation below 16 V VBB. |
| VBB (17) | Main power supply input | Primary 5.5–50 V input powering logic, charge pump, and LDO (if present); requires local 100 nF + 10 µF decoupling. |
| VBRG (18) | High-side bridge voltage sense | Monitors top-of-bridge voltage to enable accurate VDS measurement across high-side MOSFETs. |
| GND (19) | Ground reference | Single analog/digital/power ground; must connect to thermal pad and system ground plane. |
| VDSTH (21) | VDS fault threshold programming | Analog input (0.2–2.0 V) setting per-phase short-circuit detection level; high-impedance, supports resistor divider. |
| FAULT (22) | Open-drain fault indicator | Active-high signal pulled externally to ≤5.5 V; asserts on short, UVLO, or overtemperature events. |
| AHI/ALO (23/24), BHI/BLO (25/26), CHI/CLO (27/28) | Phase control inputs | Independent TTL-level inputs controlling each high/low gate drive; internal lockout prevents shoot-through. |
Key Features
| Feature | Design Value |
|---|---|
| Charge-pump gate drive regulator | Maintains ≥10 V gate drive down to VBB = 7 V, enabling full-performance N-MOSFET operation across wide battery discharge curves. |
| Programmable VDS fault threshold | Voltage applied to VDSTH pin (0.2–2.0 V) directly sets short-circuit detection level per phase, supporting diverse MOSFET RDS(on) values. |
| Integrated crossover protection | Hardware lockout prevents simultaneous high/low-side activation in any phase, eliminating shoot-through risk without software timing constraints. |
| Sleep mode with ultra-low quiescent current | Enters ≤15 µA sleep after 10 ms of low logic on all six control inputs - critical for battery runtime extension in portable tools. |
| Bootstrap capacitor management logic | Requires initial low-side activation (GLx) before high-side (GHx) to precharge Cx–Sx; prevents high-side failure during startup. |
Applications
| Lawn and Garden Equipment | Battery-Powered Power Tools |
|---|---|
|
Use Scenario: Cordless string trimmers and hedge trimmers requiring high-torque BLDC motor control with battery voltage sag from 25.2 V (6S Li-ion) down to 18 V. IC Role / Device Role / Timing Role: Three-phase gate driver providing synchronized high/low-side switching, VDS fault detection, and regulated 13 V gate drive to sustain MOSFET performance across full battery discharge. Use Value: Enables >95% efficiency at 20 A phase current while detecting winding shorts before MOSFET failure, extending tool service life. |
Use Scenario: 18–20 V cordless drills and impact drivers demanding rapid acceleration, stall protection, and thermal resilience in handheld enclosures. IC Role / Device Role / Timing Role: Gate driver with integrated short-circuit detection and 28 °C/W thermal resistance, allowing compact PCB layout without forced air cooling. Use Value: Reduces bill-of-materials by eliminating discrete protection ICs and enables firmware-agnostic fault handling via single FAULT pin. |
| Industrial Grinders | CPAP Machines |
|
Use Scenario: Brushless grinders operating from 48 V DC supplies with continuous duty cycles and high ambient temperatures up to 70 °C. IC Role / Device Role / Timing Role: High-current gate driver with overtemperature warning (170 °C) and robust VBRG-sensed high-side voltage monitoring for reliable operation under sustained load. Use Value: Prevents thermal runaway during prolonged grinding by triggering FAULT before junction exceeds 165 °C max rating. |
Use Scenario: Medical-grade CPAP blowers requiring silent, low-EMI motor control, precise pressure regulation, and fail-safe shutdown on motor fault. IC Role / Device Role / Timing Role: Gate driver with programmable VDS threshold and open-drain FAULT output interfacing directly to safety MCU for Class II medical compliance. Use Value: Supports IEC 60601-1 fault response requirements with <2 µs fault blanking and latched diagnostic reporting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar three-phase N-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6532GQ-Z | Integrated 3.3 V LDO, no Sleep mode, lower RDS(on)DN (1.2 Ω typ), 24-pin QFN only | Preferred where board space is constrained and external 3.3 V rail is unnecessary; lacks ultra-low-power sleep for battery tools | Select MP6532GQ-Z when needing smaller footprint and built-in logic supply, but verify thermal derating at >15 A phase current. |
| DRV8305PWP | Integrated current sense amplifiers, SPI interface, 1.5 A peak gate drive, 32-pin HTSSOP | Suited for closed-loop torque control systems requiring real-time phase current feedback and programmable protection | Choose DRV8305PWP when sensorless FOC is insufficient and hardware current monitoring is required for medical or precision industrial use. |
Compared with A4919GLPTR-T, MP6532GQ-Z offers higher integration but sacrifices sleep-mode power savings, while DRV8305PWP adds digital configurability and sensing at the cost of larger package and higher BOM complexity - making A4919GLPTR-T optimal for cost-sensitive, high-reliability BLDC drives with analog control architecture.
Availability
A4919GLPTR-T is available at Aetrix Electronics and suitable for lawn and garden equipment, battery-operated power tools, and CPAP machines requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant packaging.
Supply support for A4919GLPTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based semiconductor company specializing in magnetic sensing, power ICs, and motor control solutions, with design centers in New Hampshire and global manufacturing partnerships.
The A4919 product line delivers high-current, fault-protected three-phase gate drivers for BLDC motors in portable and industrial applications - engineered for reliability under voltage sag, thermal stress, and short-circuit conditions.
FAQ
What is the minimum VBB voltage at which A4919GLPTR-T maintains full gate drive capability?
A4919GLPTR-T maintains full gate drive (>10 V on VREG) down to VBB = 7 V using its internal charge pump regulator. Below 7 V, functional operation continues down to 5.5 V but with reduced gate drive voltage - verified in Electrical Characteristics Table (VREG output drops to 8.5–9.5 V at 5.5–6 V VBB). This ensures BLDC motor startup and low-speed torque even with deeply discharged batteries.
Does A4919GLPTR-T include an integrated LDO regulator?
No, A4919GLPTR-T does not include an integrated LDO regulator. Per the Selection Guide, it is the "No LDO" variant (suffix -T without -3 or -5), and its VDDM pin serves only as a monitor input - not a power output. The LDO variants are A4919GLPTR-3-T (3.3 V) and A4919GLPTR-5-T (5 V); A4919GLPTR-T relies on external logic supplies.
How does the Sleep mode function on A4919GLPTR-T, and what triggers wake-up?
A4919GLPTR-T enters Sleep mode after 7.5–12.5 ms of simultaneous logic-low states on all six control inputs (AHI/ALO/BHI/BLO/CHI/CLO), reducing quiescent current to ≤15 µA. Wake-up occurs within ≤1 ms of any control input rising above VIH (≥2.0 V). Upon wake-up, all gate drivers resume operation - but low-side drives (GLx) must be activated first to recharge bootstrap capacitors before high-side (GHx) can turn on.
What is the purpose of the VDSTH pin on A4919GLPTR-T, and what voltage range sets valid fault thresholds?
The VDSTH pin on A4919GLPTR-T programs the drain-source voltage threshold for short-circuit detection. A voltage between 0.2 V and 2.0 V applied to VDSTH directly sets the VDS fault threshold with specified accuracy (±100 mV offset). Voltages below 0.1 V disable VDS monitoring; above 2.7 V defaults to internal 1.2 V threshold. This allows calibration for MOSFETs with varying RDS(on) without changing hardware.
Can A4919GLPTR-T drive both high-side and low-side N-channel MOSFETs without external level shifters?
Yes, A4919GLPTR-T drives high-side N-channel MOSFETs using bootstrap capacitors (CA–SA, CB–SB, CC–SC) charged via VREG, eliminating need for external high-side drivers or level shifters. Low-side N-MOSFETs are driven directly from GLA/GLB/GLC referenced to LSS. The IC's integrated charge pump and bootstrap management enable full-N-channel 3-phase bridges with only passive external components.
A4919GLPTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- High-Side or Low-Side
- Channel Type:
- 3-Phase
- Number of Drivers:
- 6
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 5.5V ~ 50V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- TTL
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 35ns, 20ns
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
A4919GLPTR-T FAQ
1.How can I place an order for A4919GLPTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A4919GLPTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A4919GLPTR-T reliable?
The price and inventory of A4919GLPTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A4919GLPTR-T is usually 5 days.
3.What payment methods are accepted for A4919GLPTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A4919GLPTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A4919GLPTR-T?
A4919GLPTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A4919GLPTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A4919GLPTR-T?
For technical support, including A4919GLPTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A4919GLPTR-T requirements.
6.How does Aetrix verify that A4919GLPTR-T is sourced from the original manufacturer or authorized distributors?
All A4919GLPTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A4919GLPTR-T meets industry standards.
7.What is the process for return or replacement of A4919GLPTR-T?
All A4919GLPTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A4919GLPTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A4919GLPTR-T part is unused and in its original packaging.
Return procedure for A4919GLPTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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