Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Gate Drivers

Allegro MicroSystems A89503KLPTR-3

Name: A89503KLPTR-3
Brand: Allegro MicroSystems
SKU: A89503KLPTR-3
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: A89503KLPTR-3

Manufacturer:: Allegro MicroSystems

Category:: Gate Drivers

Package:: 24-TSSOP (0.173", 4.40mm Width) Exposed Pad

Datasheet:: A89503KLPTR-3.pdf

Description:: IC GATE DRVR HALF-BRIDGE 24TSSOP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,000

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

A89503KLPTR-3 from Allegro MicroSystems is a 3.3 V logic-compatible, 80 V automotive half-bridge N-channel MOSFET driver designed for high-power inductive loads including BLDC motors, solenoids, and actuators. It features independent high-side/low-side gate drive control, integrated charge pump regulator (5.5–80 V supply range), SPI-compatible serial interface, and ASIL B safety compliance per ISO 26262.

For engineers reviewing the A89503KLPTR-3 datasheet, A89503KLPTR-3 pinout, A89503KLPTR-3 application, or A89503KLPTR-3 equivalent, this device supports battery-compliant logic inputs, programmable V_DS fault thresholds, current sense amplifier with 10–50 V/V gain, bootstrap gate drive, and diagnostic reporting via dedicated DIAG output and serial register reads.

Technical Context

The A89503KLPTR-3 implements a dual-regulator architecture: a linear regulator supplies internal logic (V_DL = 3.1–3.5 V) and a charge pump generates V_REG = 9–11.7 V for gate drive, enabling full N-channel FET operation down to 5.5 V V_BB. Its bootstrap circuit uses external capacitor C at Pin 18 and supports cross-conduction mode with simultaneous HS/LS activation.

Diagnostic monitoring includes programmable high-side/low-side V_DS thresholds (0–3.15 V), overcurrent detection (0.3–4.8 V), temperature warning (125–145 °C), and fault blanking via serial interface. All logic inputs (except RESETn) tolerate 0–80 V and are compatible with 3.3 V CMOS levels - confirmed for A89503KLPTR-3 by V_IO = 3.0–3.6 V specification.

Key Specifications

Parameter	Value and Actual Design Meaning
V_BB Range	5.5 to 80 V - supports wide automotive battery voltage swings including cold-crank (5.5 V) and load-dump (80 V) conditions.
V_IO Logic Supply	3.0–3.6 V - defines 3.3 V logic compatibility for HS, LSn, ENABLE, STRn, SCK, SDI, SDO pins per A89503KLPTR-3 variant.
Gate Drive Voltage	V_REG = 9–11.7 V - powers low-side gate drive; bootstrap-derived V_C enables >10 V high-side gate drive down to 7 V V_BB.
Current Sense Gain	Programmable 10–50 V/V - allows precise shunt-based motor phase current measurement across varying load ranges.
ASIL Rating	ASIL B hardware safety element out-of-context - certified per ISO 26262 for use in safety-related automotive systems when implemented per safety manual.
Thermal Resistance	R_θJA = 28 °C/W - measured on 4-layer JEDEC PCB, enabling thermal design for continuous 150 °C ambient operation.
Diagnostic Outputs	Dedicated open-drain DIAG pin + full register readback via SPI - provides both immediate fault flagging and root-cause diagnostics (V_DS, overtemp, OC, etc.).

Pinout & Package

Package: 24-lead eTSSOP with exposed thermal pad (suffix LP); Pb-free, 100% matte-tin leadframe plating (suffix –T).

Pin/Terminal	Circuit Role	Design Meaning
GND (1)	Power Ground Reference	Primary return path for all internal regulators, gate drivers, and sense amplifier; must be connected to low-impedance system ground plane.
DIAG (2)	Open-Drain Fault Indicator	Asserts low on any enabled fault (V_DS, overtemp, OC, UV/OV); requires external pull-up to V_IO or V_BB.
ENABLE (3)	Bridge Output Enable Control	Active-high logic input; disables both gate drives (GH/GL = high-Z) when low, reducing quiescent current to ≤30 µA in sleep mode.
RESETn (4)	Asynchronous Reset Input	Active-low input that forces all registers and outputs to power-on default state; tolerant to 0–80 V, with 2.4 V min VIH.
HS (5)	High-Side Gate Control Input	Direct logic-level input for high-side FET; used with LSn for independent half-bridge control or disabled when using SPI register control.
LSn (6)	Low-Side Gate Control Input	Inverted logic input for low-side FET; complements HS for standard half-bridge operation; battery-compliant (0–80 V tolerant).
SDI (7)	SPI Serial Data Input	MOSI line for configuration and status register writes; CMOS input referenced to V_IO, with 50 kΩ internal pull-down.
SCK (8)	SPI Clock Input	Master-generated clock up to 10 MHz; timing-critical for register access; 50 ns minimum high/low pulse width specified.
SDO (9)	SPI Serial Data Output	MISO line for reading diagnostic, status, and configuration registers; tri-stated when STRn is high.
STRn (10)	SPI Chip Select Input	Active-low enable for SPI interface; internal 50 kΩ pull-up to V_IO; must be asserted before SCK/SDI activity.
CSO (11)	Current Sense Amplifier Output	Analog output of differential shunt voltage (CSP–CSM) scaled by programmable gain/offset; rail-to-rail 0.3–4.8 V range.
CSM (12)	Current Sense Amp Inverting Input	Connects to low-side shunt resistor terminal; supports common-mode range from –1.5 V to +2 V for accurate sensing during PWM transitions.
CSP (13)	Current Sense Amp Non-Inverting Input	Connects to high-side shunt resistor terminal; enables bidirectional current measurement with programmable offset compensation.
LSS (14)	Low-Side Source Terminal	Return path for low-side gate drive and current sense amplifier; connects directly to source of external low-side N-MOSFET.
GL (15)	Low-Side Gate Drive Output	High-current gate driver output (–1150 mA peak sink, 1.25 Ω R_DS(on) at 25°C); drives gate of external low-side N-MOSFET.
GH (16)	High-Side Gate Drive Output	Bootstrap-referenced gate driver (–1150 mA peak sink, 5.6 kΩ pull-up resistance); drives gate of external high-side N-MOSFET.
S (17)	Load Connection / High-Side Source	Output node connecting to load and high-side MOSFET source; also serves as bootstrap reference (VS) for GH drive voltage.
C (18)	Bootstrap Capacitor Terminal	Connects external bootstrap capacitor between C and S; charges during LS conduction to supply GH drive above battery voltage.
D (19)	Low-Side Drain Terminal	Connects to drain of external low-side N-MOSFET; forms half-bridge output node with S terminal.
VREG (20)	Regulated Gate Drive Supply	Internally generated 9–11.7 V supply powering GL driver and logic I/O regulator; requires 10 µF ceramic decoupling to GND.
CP2 (21)	Charge Pump Capacitor Terminal 2	Second connection for external charge pump capacitor (CCP); works with CP1 to generate V_REG from V_BB.
CP1 (22)	Charge Pump Capacitor Terminal 1	First connection for external charge pump capacitor (CCP); forms flying capacitor network with CP2 for V_REG generation.
VBB (23)	Main Power Supply Input	Primary 5.5–80 V input powering charge pump, regulators, and diagnostics; requires reverse-voltage protection and local ceramic decoupling.
VBRG (24)	High-Side Drain Voltage Sense	Monitors voltage at drain of high-side MOSFET; enables V_DS-based short-circuit detection with programmable threshold (0–3.15 V).
PAD	Exposed Thermal Pad	Internally connected to GND; must be soldered to large copper pour for thermal dissipation and EMI reduction.

Key Features

Feature	Design Value
Independent HS/LS Control	Enables cross-conduction mode (both FETs on simultaneously) for synchronous rectification or active freewheeling in BLDC control.
Programmable V_DS Threshold	Configurable 0–3.15 V trip point per FET via SPI registers, allowing precise short-circuit detection across varying bus voltages and MOSFET R_DS(on).
Integrated Current Sense Amplifier	10–50 V/V gain and 0–2.5 V offset programmability enable accurate, noise-immune shunt-based current measurement without external op-amps.
ASIL B Safety Certification	Hardware safety element out-of-context developed per ISO 26262; includes lockstep diagnostics, fault masking, and safe state management for automotive safety systems.
Bootstrap + Charge Pump Architecture	Eliminates need for external high-voltage gate driver ICs; maintains >10 V gate drive for N-MOSFETs down to 7 V V_BB, with guaranteed operation to 5.5 V.

Applications

Brush DC Motor Control	BLDC Motor Commutation
Use Scenario: Bidirectional speed/torque control of automotive radiator fans, HVAC blowers, or power seat actuators using H-bridge topology. IC Role / Device Role: Half-bridge pre-driver providing isolated, high-current gate signals to external N-MOSFETs while monitoring V_DS and load current. Use Value: Enables efficient 12/24 V brush DC motor control with integrated diagnostics (overcurrent, overtemperature, short-circuit) reducing system BOM count.	Use Scenario: Six-step commutation for 3-phase BLDC motors in electric power steering (EPS) or cooling pumps. IC Role / Device Role: Configurable gate driver supporting independent HS/LS timing, programmable dead-time via fault blanking, and real-time current feedback for torque regulation. Use Value: Reduces microcontroller GPIO count and timing complexity while delivering precise phase current sensing and fault response within <100 µs.
Solenoid Actuation	Valve & Actuator Control
Use Scenario: High-energy pulse driving of fuel injectors, transmission shift solenoids, or brake-by-wire valves requiring fast turn-on/turn-off and energy recovery. IC Role / Device Role: High-voltage half-bridge driver with programmable gate drive strength and active freewheeling capability via cross-conduction mode. Use Value: Supports 80 V load dump immunity and delivers >1 A peak gate current for rapid MOSFET switching, minimizing solenoid response latency.	Use Scenario: Precision positioning of throttle bodies, EGR valves, or turbocharger vanes using closed-loop current-controlled actuation. IC Role / Device Role: Integrated current sense amplifier with programmable gain/offset provides direct feedback for PID current control loop without external signal conditioning. Use Value: Eliminates need for discrete current-sense op-amp and ADC input scaling, improving accuracy and reducing layout sensitivity to noise.

Brush DC Motor Control

BLDC Motor Commutation

Use Scenario: Bidirectional speed/torque control of automotive radiator fans, HVAC blowers, or power seat actuators using H-bridge topology.

IC Role / Device Role: Half-bridge pre-driver providing isolated, high-current gate signals to external N-MOSFETs while monitoring V_DS and load current.

Use Value: Enables efficient 12/24 V brush DC motor control with integrated diagnostics (overcurrent, overtemperature, short-circuit) reducing system BOM count.

Use Scenario: Six-step commutation for 3-phase BLDC motors in electric power steering (EPS) or cooling pumps.

IC Role / Device Role: Configurable gate driver supporting independent HS/LS timing, programmable dead-time via fault blanking, and real-time current feedback for torque regulation.

Use Value: Reduces microcontroller GPIO count and timing complexity while delivering precise phase current sensing and fault response within <100 µs.

Solenoid Actuation

Valve & Actuator Control

Use Scenario: High-energy pulse driving of fuel injectors, transmission shift solenoids, or brake-by-wire valves requiring fast turn-on/turn-off and energy recovery.

IC Role / Device Role: High-voltage half-bridge driver with programmable gate drive strength and active freewheeling capability via cross-conduction mode.

Use Value: Supports 80 V load dump immunity and delivers >1 A peak gate current for rapid MOSFET switching, minimizing solenoid response latency.

Use Scenario: Precision positioning of throttle bodies, EGR valves, or turbocharger vanes using closed-loop current-controlled actuation.

IC Role / Device Role: Integrated current sense amplifier with programmable gain/offset provides direct feedback for PID current control loop without external signal conditioning.

Use Value: Eliminates need for discrete current-sense op-amp and ADC input scaling, improving accuracy and reducing layout sensitivity to noise.

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge MOSFET driver applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MPQ6612GJ-A	40 V max V_BB, no charge pump, fixed 5 V gate drive; lacks SPI interface, V_DS monitoring, and ASIL certification.	Targeted at 12 V non-safety-critical industrial loads; unsuitable for 24/48 V automotive or ASIL-B systems.	Select only for cost-sensitive 12 V applications where diagnostics and safety compliance are not required.
TPS6H3101-Q1	65 V max V_BB, integrated current sense, but no bootstrap/charge pump - requires external high-side driver or P-MOSFET; SPI interface present.	Designed for lower-voltage EV subsystems (e.g., body control modules); cannot support 80 V load dump or high-side N-MOSFETs without external components.	Prefer when system voltage stays below 65 V and high-side P-MOSFETs are acceptable; avoid if N-MOSFET half-bridge with bootstrap is mandatory.

Compared with MPQ6612GJ-A and TPS6H3101-Q1, the A89503KLPTR-3 uniquely combines 80 V operation, bootstrap-enabled N-MOSFET support, ASIL B certification, and full diagnostic register visibility - making it the only option qualified for high-reliability 24/48 V automotive power stages requiring functional safety.

Availability

A89503KLPTR-3 is available at Aetrix Electronics and suitable for automotive motor control, solenoid actuation, and valve positioning applications requiring stable component supply, long-term lifecycle support, and AEC-Q100 Grade 0 qualification.

Supply support for A89503KLPTR-3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance power ICs and magnetic sensors, headquartered in Manchester, NH, serving automotive, industrial, and consumer markets since 1989.

The A89503 product line was developed specifically for ASIL-B-compliant automotive power stages - targeting high-power inductive loads such as BLDC motors, solenoids, and actuators in EPS, HVAC, and chassis control systems.

FAQ

What logic voltage level does the A89503KLPTR-3 support?

The A89503KLPTR-3 is specifically configured for 3.3 V logic compatibility, with V_IO = 3.0–3.6 V. Its HS, LSn, ENABLE, STRn, SCK, SDI, and SDO pins operate at standard CMOS levels referenced to this supply, and all except RESETn tolerate 0–80 V battery voltage transients without damage. This distinguishes it from the A89503KLPTR-5 variant, which supports 5 V logic.

How does the A89503KLPTR-3 achieve high-side gate drive for N-channel MOSFETs?

The A89503KLPTR-3 uses an integrated charge pump regulator to generate V_REG (9–11.7 V) and a bootstrap capacitor (connected between Pin 18/C and Pin 17/S) to create a floating supply for the high-side gate driver (GH). During low-side conduction, the bootstrap capacitor charges through an internal diode; during high-side conduction, it supplies gate voltage above the source (S), enabling full enhancement of external N-channel MOSFETs even at low V_BB (down to 5.5 V).

Does the A89503KLPTR-3 include current sensing capability?

Yes, the A89503KLPTR-3 integrates a precision current sense amplifier with differential inputs CSP/CSM and single-ended output CSO. It offers programmable gain (10–50 V/V) and offset (0–2.5 V) via SPI registers, supports common-mode range from –1.5 V to +2 V, and delivers rail-to-rail output (0.3–4.8 V) - enabling accurate, noise-immune shunt-based current measurement without external components.

What safety certifications apply to the A89503KLPTR-3?

The A89503KLPTR-3 is developed as a hardware safety element out-of-context (SEooC) with ASIL B capability per ISO 26262. It is AEC-Q100 Grade 0 qualified (–40 °C to +150 °C ambient), includes lockstep diagnostics, programmable fault blanking, and safe state management. Full compliance requires implementation per the official Allegro safety manual and integration into a validated safety architecture.

Can the A89503KLPTR-3 drive both high-side and low-side MOSFETs simultaneously?

Yes, the A89503KLPTR-3 supports cross-conduction mode - fully independent control of GH and GL allows both external N-channel MOSFETs to be turned on simultaneously. This is enabled via direct logic inputs (HS = 1, LSn = 0) or SPI register settings (HSR = 1, LSR = 1), and is used in applications like synchronous rectification and active freewheeling in BLDC motor control.

A89503KLPTR-3 Specifications

Product attributes: Attribute value

Manufacturer:: Allegro MicroSystems

Series:: -

Package/Case:: 24-TSSOP (0.173", 4.40mm Width) Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Discontinued at Digi-Key

Programmable:: Not Verified

Driven Configuration:: Half-Bridge

Channel Type:: Synchronous

Number of Drivers:: 1

Gate Type:: N-Channel MOSFET

Voltage - Supply:: 5.5V ~ 80V

Logic Voltage - VIL, VIH:: 0.8V, 2.4V

Current - Peak Output (Source, Sink):: -

Input Type:: Non-Inverting

High Side Voltage - Max (Bootstrap):: -

Rise / Fall Time (Typ):: 235ns, 97ns

Operating Temperature:: -40°C ~ 150°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 24-TSSOP-EP

A89503KLPTR-3 FAQ

1.How can I place an order for A89503KLPTR-3 through Aetrix?

Please submit a Request for Quotation (RFQ) for A89503KLPTR-3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for A89503KLPTR-3 reliable?

The price and inventory of A89503KLPTR-3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A89503KLPTR-3 is usually 5 days.

3.What payment methods are accepted for A89503KLPTR-3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A89503KLPTR-3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for A89503KLPTR-3?

A89503KLPTR-3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your A89503KLPTR-3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for A89503KLPTR-3?

For technical support, including A89503KLPTR-3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A89503KLPTR-3 requirements.

6.How does Aetrix verify that A89503KLPTR-3 is sourced from the original manufacturer or authorized distributors?

All A89503KLPTR-3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A89503KLPTR-3 meets industry standards.

7.What is the process for return or replacement of A89503KLPTR-3?

All A89503KLPTR-3 units undergo pre-shipment inspection (PSI). If there is an issue with A89503KLPTR-3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The A89503KLPTR-3 part is unused and in its original packaging.

Return procedure for A89503KLPTR-3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…