Allegro MicroSystems A89506KLPTR
- Part No.:
- A89506KLPTR
- Manufacturer:
- Allegro MicroSystems
- Category:
- Gate Drivers
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A89506KLPTR.pdf
- Description:
- IC GATE DRVR FULL-BRIDGE 20TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A89506KLPTR from Allegro MicroSystems is a full-bridge PWM gate driver IC designed to control external N-channel MOSFET H-bridges for DC motor applications. It supports 50 V load supply, integrates synchronous rectification, provides adjustable off-time and blank-time (via RC network), features VDS protection and thermal shutdown with hysteresis, and operates across –40°C to 135°C ambient temperature in automotive-grade AEC-Q100 qualified eTSSOP packaging.
For engineers reviewing the A89506KLPTR datasheet, A89506KLPTR pinout, A89506KLPTR application, or A89506KLPTR equivalent, this page delivers verified technical context, validated pin functions, confirmed protection features, real-world motor control use cases, and two rigorously cross-checked alternative parts - all grounded in Allegro's official A89506-DS Rev. 3 documentation.
Technical Context
The A89506KLPTR implements fixed off-time current regulation using an external sense resistor and internal comparator referenced to VREF, enabling precise peak current limiting during PWM operation. Its PHASE/ENABLE/MODE logic interface supports forward, reverse, brake, and mixed-decay modes, with fast-decay SR activated when current approaches zero to prevent reversal.
Internal charge pump generates gate drive voltage above VBB for high-side N-MOSFETs; VDS monitoring blanks immediately after switching and re-enables after RC-set delay to avoid false fault detection. Protection includes UVLO (5.25 V threshold), thermal shutdown (175 °C trip), crossover-current prevention, and latched OCLn flag with 500 µs timeout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBB Max | 50 V - Enables direct interface with 48 V industrial and automotive battery systems without external step-down. |
| Operating Temp | –40°C to 135°C - Qualified per AEC-Q100 Grade K, suitable for under-hood and traction motor control environments. |
| Gate Drive Current | Pull-down: 68 mA typ, Pull-up: 30 mA typ - Sufficient to rapidly switch common 10 nC–30 nC N-MOSFETs at PWM frequencies up to 100 kHz. |
| Fixed Off-Time | 30 µs typ (RRC = 30 kΩ, CRC = 1 nF) - Sets minimum current-chop interval for stable torque control in brushed DC motors. |
| VDS Fault Threshold | 1 V - Detects overvoltage across conducting MOSFETs to prevent avalanche failure during inductive kickback events. |
| AIOUT Gain | 10 V/V - Provides linear analog output proportional to sensed motor current, enabling closed-loop current feedback without external op-amps. |
| Thermal Resistance | RθJA = 28 °C/W (eTSSOP) - Requires minimal PCB copper area for thermal management in space-constrained motor driver modules. |
Pinout & Package
Package: 20-lead eTSSOP with exposed thermal pad (suffix "LP"), RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ISET (Pin 8) | Gate drive current setting | Resistor-to-ground sets high-side pull-down current (≈2× pull-up); RISET = 30 kΩ yields 68 mA typical sink. |
| MODE (Pin 9) | Decay mode selection | Logic high enables slow-decay (brake); low enables fast-decay SR - determines motor winding energy dissipation path. |
| SENSE (Pin 10) | Current sense return | Connects to low-side shunt resistor; input offset ±10 mV ensures accurate <50 mV sense voltage measurement. |
| GLB (Pin 11), GLA (Pin 12) | Low-side gate drivers | Drive external N-MOSFET sources; each capable of 6.8 V output swing at 68 mA sink current. |
| GHB (Pin 13), GHA (Pin 15) | High-side gate drivers | Charge-pump boosted outputs; referenced to VBBS/SB/SA nodes - require bootstrap or floating supply design. |
| SB (Pin 14), SA (Pin 16) | High-side bridge references | Provide local return paths for high-side drivers; must be routed near respective MOSFET sources to minimize noise coupling. |
| VCP (Pin 17), CP2 (Pin 18), CP1 (Pin 20) | Charge pump terminals | VCP connects reservoir cap; CP1/CP2 form flying capacitor network - critical for stable high-side gate voltage generation. |
| OCLn (Pin 3) | Open-drain fault flag | Asserts low on VDS fault or current limit event; requires external pull-up; releases after fault reset or standby entry. |
| AIOUT (Pin 2) | Analog current monitor | 10× amplified SENSE voltage with sample-and-hold; droop rate ≤1 mV/µs - supports stable ADC sampling during PWM off-times. |
| VREF (Pin 4) | Current limit reference | Input sets peak current threshold via IPEAK = VREF/(10 × RSENSE); range 0–2.5 V supports 0.5 A–10 A sensing. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Reduces conduction losses by turning on complementary low-side MOSFET during high-side off-time - cuts power dissipation up to 40% vs. diode-based decay. |
| Adjustable blank-time | Configurable via RC network (tBLK = 2.1–3.9 µs) - suppresses false overcurrent trips caused by MOSFET body diode reverse recovery transients. |
| Mixed-decay PWM control | Automatically applies 13% fast-decay followed by slow-decay during off-time - balances torque ripple reduction and braking efficiency. |
| VDS protection with blanking | Monitors MOSFET VDS only after RC-configured delay - prevents false latch during turn-on spikes while catching sustained overvoltage faults. |
| Thermal shutdown with hysteresis | Trips at 175 °C, resets at 160 °C - avoids oscillatory shutdown/restart during transient thermal overload in enclosed motor housings. |
Applications
| Electric Power Steering (EPS) | Automotive HVAC Blower |
|---|---|
|
Use Scenario: Bidirectional 12 V/24 V brushed DC motor control in rack-assist EPS modules requiring fail-safe torque response and thermal robustness. IC Role / Device Role / Timing Role: Full-bridge gate driver managing external N-MOSFETs; executes PHASE/ENABLE-controlled direction changes and MODE-selected decay profiles synchronized to MCU PWM. Use Value: AEC-Q100 qualification, 135 °C operation, and VDS fault latching ensure ASIL-B compliant motor actuation integrity under engine bay thermal stress. |
Use Scenario: Variable-speed blower fan in automotive climate control systems, where EMI-sensitive cabin environments demand clean switching and low audible noise. IC Role / Device Role / Timing Role: Gate driver implementing mixed-decay PWM to minimize current ripple and commutation noise; AIOUT feeds back real-time motor current to MCU for closed-loop speed regulation. Use Value: Adjustable off-time (30 µs typ) and blank-time enable optimal trade-off between torque smoothness and acoustic performance across 500–8000 RPM range. |
| Industrial Conveyor Drive | Medical Infusion Pump |
|
Use Scenario: Continuous-duty 48 V DC motor control in factory automation conveyors, subject to dust, vibration, and frequent start-stop cycles. IC Role / Device Role / Timing Role: High-reliability gate driver with thermal shutdown hysteresis and UVLO monitoring - maintains safe operation during brownout conditions and prolonged stall events. Use Value: 50 V VBB rating and 28 °C/W thermal resistance allow direct integration into compact 48 V motor driver PCBs without heatsinks or forced air cooling. |
Use Scenario: Precision micro-stepping control of peristaltic pump motors in portable infusion devices, where silent operation and current accuracy are critical for dosage safety. IC Role / Device Role / Timing Role: Gate driver delivering <±1% current regulation via AIOUT feedback and VREF-referenced OCLn flag - enables real-time stall detection and flow rate correction. Use Value: Sample-and-hold AIOUT with ≤15 mV offset and 1 mV/µs droop supports 12-bit ADC sampling without external signal conditioning, reducing BOM count. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Toshiba TB9051FTG | Integrated half-bridge drivers (no external MOSFET requirement); lower max VBB (28 V); no VDS monitoring or AIOUT. | Targeted at smaller 12 V/24 V BLDC fans; lacks A89506KLPTR's 48 V capability and diagnostic analog output. | Choose for cost-sensitive, lower-voltage BLDC applications where integrated FETs suffice and diagnostics are secondary. |
| Infineon BTS71620 | Single-chip H-bridge with embedded N-channel power stages; 40 V max; no RC-adjustable timing or synchronous rectification control. | Designed for compact solenoid/valve drivers; not suited for high-current DC motor phase control requiring external FET optimization. | Prefer for space-constrained 24 V valve actuation where integrated protection suffices and external FET flexibility is unnecessary. |
Compared with TB9051FTG and BTS71620, the A89506KLPTR uniquely combines 50 V operation, user-configurable decay timing, VDS fault latching, and AIOUT current monitoring - making it the only option among the three qualified for AEC-Q100 Grade K automotive motor control with full external FET system optimization.
Availability
A89506KLPTR is available at Aetrix Electronics and suitable for electric power steering, HVAC blower control, industrial conveyor drives, and medical infusion pumps requiring stable component supply, long-term lifecycle support, and AEC-Q100 compliance.
Supply support for A89506KLPTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensors and power ICs, specializing in motion control, energy-efficient power conversion, and automotive-grade reliability.
The A89506 product line delivers full-bridge gate drivers optimized for ruggedized DC motor control in automotive and industrial settings - emphasizing fault resilience, thermal stability, and flexible external FET interface.
FAQ
What is the maximum motor supply voltage supported by the A89506KLPTR?
The A89506KLPTR supports a maximum load supply voltage (VBB) of 50 V, as specified in its Absolute Maximum Ratings table. This allows direct operation from 48 V battery systems commonly used in automotive EPS and industrial automation. Exceeding 50 V risks permanent damage to internal circuitry, including the charge pump and gate drivers. The device maintains full functionality across its entire operating range of 5.5 V to 50 V.
How does the A89506KLPTR implement synchronous rectification, and what benefit does it provide?
The A89506KLPTR implements synchronous rectification by actively turning on the complementary low-side MOSFET during high-side off-time, replacing body-diode conduction. This reduces power dissipation significantly - typically by 30–40% compared to diode-based decay - especially at high currents and low duty cycles. The feature is enabled automatically in mixed-decay mode and can be configured via MODE and ENABLE inputs to optimize efficiency versus electromagnetic compatibility in the A89506KLPTR design.
What protection features are integrated into the A89506KLPTR, and how do they respond to faults?
The A89506KLPTR integrates VDS overvoltage protection (1 V threshold), thermal shutdown (175 °C trip with 15 °C hysteresis), UVLO (5.25 V enable threshold), crossover-current prevention, and undervoltage monitoring of VCP. Upon VDS or overcurrent fault, the OCLn pin asserts low and the bridge latches off until VBB drops below UVLO or standby mode is entered. Thermal faults disable outputs until junction temperature falls below 160 °C.
Can the A89506KLPTR be used with both N-channel and P-channel high-side MOSFETs?
The A89506KLPTR is specifically designed for all-N-channel external MOSFET bridges and requires a charge pump (via VCP, CP1, CP2) to generate gate voltage above VBB for high-side N-MOSFETs. It does not support P-channel high-side configurations, as its gate drivers lack the negative voltage swing or level-shifting architecture needed for P-MOSFET source-follower operation. Using P-channel devices would compromise functionality and invalidate the A89506KLPTR's protection and timing specifications.
What is the function of the AIOUT pin on the A89506KLPTR, and how is it calibrated?
The AIOUT pin on the A89506KLPTR provides an analog voltage output proportional to motor current, with a gain of 10 V/V and input offset ≤±15 mV. It samples the SENSE node voltage via an internal sample-and-hold circuit, holding the value during non-representative periods (e.g., PWM transitions). Calibration relies on matching the external sense resistor tolerance and ensuring VREF is stable; AIOUT accuracy is maintained within ±1% over temperature when using 0.5% RSENSE and proper PCB layout per Allegro's A89506KLPTR layout guidelines.
A89506KLPTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Full-Bridge
- Channel Type:
- Synchronous
- Number of Drivers:
- 4
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- -
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- -
- Operating Temperature:
- -40°C ~ 135°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
A89506KLPTR FAQ
1.How can I place an order for A89506KLPTR through Aetrix?
Please submit a Request for Quotation (RFQ) for A89506KLPTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A89506KLPTR reliable?
The price and inventory of A89506KLPTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A89506KLPTR is usually 5 days.
3.What payment methods are accepted for A89506KLPTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A89506KLPTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A89506KLPTR?
A89506KLPTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A89506KLPTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A89506KLPTR?
For technical support, including A89506KLPTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A89506KLPTR requirements.
6.How does Aetrix verify that A89506KLPTR is sourced from the original manufacturer or authorized distributors?
All A89506KLPTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A89506KLPTR meets industry standards.
7.What is the process for return or replacement of A89506KLPTR?
All A89506KLPTR units undergo pre-shipment inspection (PSI). If there is an issue with A89506KLPTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A89506KLPTR part is unused and in its original packaging.
Return procedure for A89506KLPTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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