Analog Devices Inc. ADP3624ARDZ-RL

Overview

ADP3624ARDZ-RL from Analog Devices is a high-speed, dual-channel, 4 A low-side MOSFET driver with thermal protection, designed for driving two independent N-channel power MOSFETs in switching power supplies. It operates from 4.5 V to 18 V, delivers 10 ns typical rise/fall times into 2.2 nF, and features matched propagation delays (≤2 ns), overtemperature warning (OTW) and shutdown, and 3.3 V-compatible inputs. It is used in AC/DC and DC/DC converters requiring fast, reliable gate drive with system-level fault monitoring.

For engineers reviewing the ADP3624ARDZ-RL datasheet, ADP3624ARDZ-RL pinout, ADP3624ARDZ-RL application, or ADP3624ARDZ-RL equivalent, key selection criteria include its 4.5–18 V supply range, dual noninverting input configuration, SOIC_N_EP thermally enhanced package, and integrated overtemperature warning flag-critical for robust power stage design in industrial and telecom power systems.

Technical Context

The ADP3624ARDZ-RL implements dual noninverting gate drivers with independent inputs (INA, INB) and outputs (OUTA, OUTB), each capable of sourcing/sinking ±4 A peak current. Its internal temperature sensor enables two-tier thermal protection: an open-drain OTW signal active low at 120°C–150°C and automatic shutdown at 150°C–180°C.

It features UVLO with 4.2 V turn-on and 3.9 V turn-off thresholds (hysteresis = 0.3 V), precise SD shutdown comparator (1.28 V typical threshold, 280 mV hysteresis), and supports parallel operation by tying INA/INB and OUTA/OUTB to double drive strength. Input logic is compatible with 3.3 V controllers while tolerating up to VDD.

Key Specifications

Pinout & Package

ADP3624ARDZ-RL is housed in an 8-lead SOIC_N_EP (narrow-body SOIC with exposed pad), optimized for thermal dissipation in high-current switching applications. The exposed pad must be soldered to PCB ground plane for optimal θJA = 59°C/W performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual low-side MOSFET driver applications.

Compared with LM5113MMX/NOPB and UCC27524ADR, ADP3624ARDZ-RL uniquely integrates overtemperature warning, shutdown, and precise UVLO hysteresis-reducing BOM count and improving reliability in unattended power systems without adding discrete protection components.

Availability

ADP3624ARDZ-RL is available at Aetrix Electronics and suitable for AC/DC switch mode power supplies, DC/DC buck converters, and motor drive half-bridge stages requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for ADP3624ARDZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The ADP362x family was developed specifically for high-efficiency, high-frequency power conversion systems-delivering fast, robust, thermally aware gate drive for N-MOSFETs in server, telecom, and industrial SMPS.

FAQ

What is the function of the OTW pin on the ADP3624ARDZ-RL?

The OTW (Overtemperature Warning) pin on the ADP3624ARDZ-RL is an open-drain, active-low output that asserts when the die temperature reaches the warning threshold (120°C–150°C). It allows system-level thermal monitoring without external sensors. In normal operation, OTW remains high; it pulls low to signal thermal stress, enabling the host controller to reduce load or initiate cooling. This feature is integral to ADP3624ARDZ-RL's dual-tier thermal protection architecture.

Does the ADP3624ARDZ-RL support parallel operation of its two output channels?

Yes, the ADP3624ARDZ-RL supports parallel operation: INA and INB can be tied together, and OUTA and OUTB connected to drive a single high-gate-charge MOSFET with combined ±8 A peak current. Layout symmetry and matched trace lengths are essential to ensure balanced current sharing. This capability is explicitly validated in the ADP3624ARDZ-RL datasheet Figure 25 and enables higher drive strength without changing the footprint.

What is the UVLO behavior of the ADP3624ARDZ-RL, and how does it differ from the ADP3634 variants?

The ADP3624ARDZ-RL has a 4.5 V UVLO turn-on threshold (typical 4.2 V) and 3.9 V turn-off threshold, with 0.3 V hysteresis-optimized for 5 V bias rails. In contrast, ADP3634 variants use a 9.5 V UVLO (8.7 V typical turn-on), targeting 12 V systems. This distinction is confirmed in Table 1 and the Ordering Guide; mixing them risks startup failure or premature shutdown under nominal supply conditions.

Can the ADP3624ARDZ-RL drive high-side N-channel MOSFETs directly?

No, the ADP3624ARDZ-RL is a dedicated low-side driver only: its outputs (OUTA/OUTB) are referenced to PGND and cannot float above VDD. It lacks bootstrap or charge-pump circuitry required for high-side N-MOSFET gate drive. For high-side applications, a complementary high-side driver (e.g., ADP3623) or a floating supply must be used alongside ADP3624ARDZ-RL in half-bridge configurations.

What package type and thermal performance does the ADP3624ARDZ-RL use?

The ADP3624ARDZ-RL uses the 8-lead SOIC_N_EP (RD-8-4) package with an exposed thermal pad soldered to PCB ground. Its JEDEC-standard θJA is 59°C/W on a 4-layer board, enabling reliable operation at full ±4 A output current up to +85°C ambient. This package is distinct from the MINI_SO_EP option (ADP3624ARHZ-RL) which offers lower θJA (43°C/W) but smaller footprint.