Analog Devices Inc. ADP3625ARHZ-RL

Overview

ADP3625ARHZ-RL from Analog Devices is a high-speed, dual-channel, 4 A low-side MOSFET driver in an 8-lead MINI_SO_EP package with exposed thermal pad. It features 4.5 V to 18 V supply range, 10 ns typical rise/fall time (2.2 nF load), matched propagation delays (<2 ns channel-to-channel skew), and integrated overtemperature warning (OTW) and shutdown protection. It drives N-channel power MOSFETs in synchronous buck converters and motor control half-bridges.

For engineers reviewing the ADP3625ARHZ-RL datasheet, ADP3625ARHZ-RL pinout, ADP3625ARHZ-RL application, or ADP3625ARHZ-RL equivalent, key selection criteria include its 4.5 V UVLO threshold, 3.3 V–compatible logic inputs, parallelable dual outputs, thermally enhanced MINI_SO_EP package (θ_JA = 43°C/W), and precise SD shutdown comparator for redundant OVP/OCP fault handling.

Technical Context

The ADP3625ARHZ-RL implements two independent inverting/noninverting gate drivers: INA is inverting (Channel A), INB is noninverting (Channel B), enabling flexible half-bridge or dual low-side configurations. Its internal temperature sensor provides two-tier thermal protection-OTW flag (open-drain, active-low at 120°C–150°C) and hard shutdown (150°C–180°C)-with 10°C and 30°C hysteresis respectively.

It uses a precision internal comparator for the SD input (1.21–1.35 V threshold, 240–320 mV hysteresis), supporting slow-rising fault signals like scaled output voltage. The driver delivers ±4 A peak source/sink current into capacitive loads and maintains fast propagation delays (t_D1 = 14–30 ns, t_D2 = 22–35 ns) across −40°C to +85°C ambient.

Key Specifications

Pinout & Package

ADP3625ARHZ-RL is housed in an 8-lead MINI_SO_EP package (RH-8-1) with exposed thermal pad soldered to PCB ground for optimal heat dissipation (θ_JA = 43°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual low-side MOSFET driver applications.

Compared with ADP3625ARHZ-RL, ADP3624ARHZ-RL offers simpler input logic but sacrifices half-bridge flexibility, while LM5113MMX/NOPB lacks critical thermal and shutdown intelligence - making ADP3625ARHZ-RL the preferred choice for safety-critical, thermally constrained, or high-reliability DC-DC and motor control designs.

Availability

ADP3625ARHZ-RL is available at Aetrix Electronics and suitable for AC-DC power supplies, synchronous buck converters, and motor drive half-bridges requiring stable component supply, RoHS-compliant packaging, and long-term industrial temperature support (−40°C to +85°C).

Supply support for ADP3625ARHZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The ADP362x family was designed specifically for high-frequency, high-current gate driving in energy-efficient power conversion systems - emphasizing speed, thermal resilience, and system-level fault protection beyond basic drive capability.

FAQ

What is the UVLO threshold of the ADP3625ARHZ-RL and why does it matter?

The ADP3625ARHZ-RL has a guaranteed UVLO turn-on threshold of 3.8 V to 4.5 V (typ. 4.2 V) and turn-off at 3.5 V to 4.3 V (typ. 3.9 V), with 0.3 V hysteresis. This ensures reliable startup and graceful shutdown during input rail fluctuations common in 5 V–12 V DC-DC systems. Unlike fixed-threshold drivers, this hysteresis prevents oscillatory behavior near brownout conditions - a critical reliability feature in industrial power supplies where ADP3625ARHZ-RL is deployed.

How does the ADP3625ARHZ-RL differ from the ADP3624ARHZ-RL in terms of input configuration?

The ADP3625ARHZ-RL features an inverting input on Channel A (INA) and a noninverting input on Channel B (INB), enabling direct complementary drive for half-bridge topologies without external logic. In contrast, ADP3624ARHZ-RL has noninverting inputs on both channels. This makes ADP3625ARHZ-RL uniquely suited for synchronous rectifier control where one switch must be driven inversely to the other - a distinction confirmed in Tables 3–5 and Figure 9 of the ADP362x/ADP363x datasheet Rev. B.

Can the ADP3625ARHZ-RL be used in parallel mode, and what are the constraints?

Yes - the ADP3625ARHZ-RL supports parallel operation by connecting INA and INB together and tying OUTA and OUTB to a common gate node. However, this configuration is only valid for ADP3624/ADP3634 and ADP3625/ADP3635 variants (per Figure 25), not ADP3623/ADP3633. Layout symmetry and matched trace lengths are mandatory to ensure balanced current sharing; unequal parasitics may cause thermal imbalance and premature failure. The ADP3625ARHZ-RL's matched propagation delays (<2 ns) make it well-suited for this use case.

What is the purpose of the OTW pin on the ADP3625ARHZ-RL and how is it implemented?

The OTW (Overtemperature Warning) pin on ADP3625ARHZ-RL is an open-drain, active-low output that asserts when die temperature reaches 120°C–150°C (typ. 135°C). It is electrically isolated from the shutdown function and provides early thermal margin before the 150°C–180°C hard shutdown threshold. Its open-drain structure allows multiple ADP3625ARHZ-RL devices to share a single warning bus in wire-OR fashion - a feature explicitly documented in Figure 23 and the "Overtemperature Protections" section of the datasheet.

Does the ADP3625ARHZ-RL require external gate resistors, and what value is recommended?

The ADP3625ARHZ-RL does not require external gate resistors for basic functionality, but they are strongly recommended to control dV/dt, suppress ringing, and limit peak current during switching transitions. For typical 100 nC MOSFETs at 300 kHz, a 2–5 Ω resistor per channel balances speed and EMI. The datasheet notes that larger gate resistors reduce driver power dissipation (since part of PGATE is lost in RG), but values below 1 Ω increase risk of overshoot and MOSFET gate oxide stress - a trade-off explicitly quantified in the Thermal Considerations section using IRFS4310Z as an example.