Analog Devices Inc. ADP3631ARZ-R7

Overview

ADP3631ARZ-R7 from Analog Devices is a dual, high-speed, 2 A low-side MOSFET driver in an 8-lead SOIC_N package, designed to drive two independent N-channel power MOSFETs with matched propagation delays (≤2 ns), 10 ns typical rise/fall times at 2.2 nF load, and operation across 9.5 V–18 V supply. It enables synchronous rectification and high-frequency DC-to-DC conversion.

For engineers reviewing the ADP3631ARZ-R7 datasheet, ADP3631ARZ-R7 pinout, ADP3631ARZ-R7 application, or ADP3631ARZ-R7 equivalent, key selection criteria include its precise SD shutdown comparator (1.28 V typ threshold), overtemperature warning flag (OTW), UVLO with hysteresis, 3.3 V-compatible inputs, and industry-standard SOIC_N footprint for drop-in replacement in power stage designs.

Technical Context

The ADP3631ARZ-R7 implements dual noninverting/inverting input logic per channel: INA is inverting for Channel A, while INB is noninverting for Channel B - enabling flexible gate control topologies including half-bridge bootstrap configurations. Its internal temperature sensor delivers two-tier thermal protection: OTW active-low warning at 120°C–150°C and hard shutdown at 150°C–180°C.

It features a precision shutdown comparator (SD) with 280 mV hysteresis and 1.28 V typical turn-on threshold, supporting redundant overvoltage/overcurrent fault detection. The driver maintains fast, matched propagation delays (tD1 ≤30 ns, tD2 ≤35 ns) and robust 2 A peak source/sink capability into capacitive loads up to 2.2 nF.

Key Specifications

Pinout & Package

ADP3631ARZ-R7 uses an 8-lead SOIC_N (R-8) package with 1.27 mm pitch, JEDEC MS-012-AA compliant outline, and θJA = 110.6°C/W. Pin 1 is SD (active-high shutdown), Pin 2 is INA (inverting input for OUTA), Pin 3 is PGND (power ground), Pin 4 is INB (noninverting input for OUTB), Pin 5 is OUTB, Pin 6 is VDD, Pin 7 is OUTA, and Pin 8 is OTW (open-drain overtemperature warning).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual low-side MOSFET driver applications.

Compared with ADP3631ARZ-R7, ADP3630ARZ-R7 sacrifices channel-A inversion flexibility but shares identical SOIC_N footprint and thermal protection, while LM5113SD/NOPB trades precision shutdown and OTW for higher current and integrated bootstrap support - making ADP3631ARZ-R7 optimal for thermally sensitive, logic-flexible, medium-current power stages.

Availability

ADP3631ARZ-R7 is available at Aetrix Electronics and suitable for AC-to-DC switch mode power supplies, DC-to-DC power supplies, and synchronous rectification applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for ADP3631ARZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design and manufacturing expertise spanning power management, precision instrumentation, and RF technologies.

The ADP36xx family was developed specifically for high-efficiency, high-frequency power conversion systems - emphasizing speed, thermal resilience, and logic flexibility to replace discrete driver solutions in server, telecom, and industrial SMPS designs.

FAQ

What is the logic configuration of ADP3631ARZ-R7 inputs?

The ADP3631ARZ-R7 features an asymmetric input architecture: INA (Pin 2) is inverting for OUTA, while INB (Pin 4) is noninverting for OUTB. This allows direct implementation of complementary drive for half-bridge topologies without external inverters. The ADP3631ARZ-R7 datasheet confirms this configuration in Table 6 and Figure 9, distinguishing it from the fully noninverting ADP3630ARZ-R7.

Does ADP3631ARZ-R7 support parallel operation of its two channels?

No, ADP3631ARZ-R7 does not support internal parallel operation. Unlike ADP3629/ADP3630, the ADP3631ARZ-R7's mixed inverting/noninverting input structure prevents safe channel paralleling - attempting to tie INA and INB together would cause logic conflict. Parallel drive must use two separate ADP3631ARZ-R7 units with synchronized inputs and carefully balanced PCB layout.

What is the function and electrical behavior of the OTW pin on ADP3631ARZ-R7?

The OTW (Pin 8) on ADP3631ARZ-R7 is an open-drain, active-low overtemperature warning output. It pulls low when die temperature reaches 120°C–150°C (typical 135°C) and releases high when temperature falls below the hysteresis threshold (~125°C). It sinks ≥500 µA at 0.4 V and requires an external pull-up resistor (typically 10 kΩ to VDD) to interface with microcontrollers or PMBus hosts.

Can ADP3631ARZ-R7 drive high-side N-channel MOSFETs directly?

No, ADP3631ARZ-R7 is a dedicated low-side driver and cannot directly drive high-side N-channel MOSFETs. However, it can serve as the low-side driver in a half-bridge, while its inverting INA input enables control of an external bootstrap circuit for high-side gate drive. The ADP3631ARZ-R7 requires a floating high-side supply (e.g., bootstrap capacitor or isolated DC-DC) - it does not integrate level-shifting or high-side bias generation.

What decoupling capacitance is required for VDD on ADP3631ARZ-R7?

ADP3631ARZ-R7 requires a minimum 4.7 µF low-ESR ceramic capacitor (X5R/X7R) placed directly between VDD (Pin 6) and PGND (Pin 3), supplemented by a 100 nF ceramic capacitor in parallel for high-frequency noise suppression. Both capacitors must be located within 2 mm of the pins, with short, wide traces, as specified in the "Supply Capacitor Selection" section (Page 12) of the ADP3631ARZ-R7 datasheet.