Analog Devices Inc. ADP3634ARDZ
- Part No.:
- ADP3634ARDZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
ADP3634ARDZ.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:688
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Product details
Overview
ADP3634ARDZ from Analog Devices is a high-speed, dual-channel, 4 A low-side MOSFET driver with integrated thermal protection and 3.3 V-compatible logic inputs. It operates from 9.5 V to 18 V supply, delivers 10 ns typical rise/fall times into 2.2 nF load, and features matched propagation delays for synchronous power stage control in DC-DC converters.
For engineers reviewing the ADP3634ARDZ datasheet, ADP3634ARDZ pinout, ADP3634ARDZ application, or ADP3634ARDZ equivalent, key selection criteria include its UVLO threshold (8.7 V typ), overtemperature warning/ shutdown thresholds (135 °C / 165 °C), parallelable outputs, and SOIC_N_EP thermally enhanced package with exposed pad.
Technical Context
The ADP3634ARDZ implements two independent noninverting low-side gate drivers optimized for N-channel MOSFETs, with internal biasing referenced to PGND and VDD. Its input structure supports 3.3 V logic while tolerating up to VDD-level signals, and includes internal pull-downs to ensure default-off behavior on floating inputs.
It integrates dual thermal protection: an open-drain OTW flag active below 135 °C (typ) and automatic shutdown above 165 °C (typ), both with defined hysteresis. The SD pin uses a precision comparator with 280 mV hysteresis for reliable fault-triggered disable, supporting redundant OVP/OCP schemes without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 9.5 V to 18 V - Enables direct use with high-voltage power rails in industrial and telecom SMPS. |
| Rise/Fall Time | 10 ns (typ) @ 2.2 nF - Supports >10 MHz switching in high-frequency GaN/SiC-based converters. |
| Peak Output Current | ±4 A - Sufficient to drive high-Qg MOSFETs (e.g., >100 nC) with minimal external gate resistance. |
| UVLO Threshold | 8.7 V (typ), 1.0 V hysteresis - Ensures clean startup/shutdown during brownout conditions in 12 V systems. |
| OTW Threshold | 135 °C (typ), 10 °C hysteresis - Provides early thermal margin warning before critical junction temperature is reached. |
| Propagation Delay Match | ≤2 ns - Enables precise interleaved or paralleled operation without timing skew-induced shoot-through risk. |
| Input Logic Compatibility | 3.3 V CMOS - Direct interface with modern digital PWM controllers (e.g., ADP1055, UCD3138) without level-shifting. |
Pinout & Package
ADP3634ARDZ is housed in an 8-lead SOIC_N_EP (RD-8-4) package with exposed thermal pad, offering 59°C/W θJA on JEDEC 4-layer board and optimized for high-current, high-frequency PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SD | Active-high shutdown input | Disables both outputs when pulled high; precision comparator allows use with scaled feedback voltages for OVP. |
| INA | Noninverting input for Channel A | Directly drives OUTA with same logic polarity; internal pull-down ensures OFF-state if unconnected. |
| PGND | Power ground reference | Must be connected directly to MOSFET source to minimize ground bounce and ensure accurate current sensing. |
| INB | Noninverting input for Channel B | Independent control of OUTB; enables asynchronous or interleaved gate drive configurations. |
| OUTB | Channel B output driver | Capable of ±4 A peak; designed for low-inductance connection to MOSFET gate via short, wide traces. |
| VDD | Driver power supply | Requires local 4.7 µF MLCC + 100 nF ceramic bypass to PGND to suppress switching noise and prevent oscillation. |
| OUTA | Channel A output driver | Matched to OUTB in delay and drive strength; supports parallel operation with OUTB for higher current capability. |
| OTW | Open-drain overtemperature warning | Active-low signal; wire-OR'able with other ADP36xx devices to share single thermal alert bus. |
Key Features
| Feature | Design Value |
|---|---|
| Dual noninverting low-side drivers | Enables direct replacement of discrete driver pairs in half-bridge or synchronous buck topologies without logic inversion. |
| Matched channel propagation delays | ≤2 ns mismatch ensures precise timing alignment for interleaved converters and paralleled MOSFETs. |
| Integrated overtemperature warning & shutdown | Two-tier thermal protection avoids system failure: OTW alerts controller before shutdown triggers at 165 °C (typ). |
| Industry-standard SOIC_N_EP pinout | Drop-in compatible with legacy drivers (e.g., ADP3623/ADP3624), simplifying upgrade paths in existing designs. |
| Parallelable outputs | INA and INB tied together, OUTA and OUTB joined - doubles peak current to ±8 A while reducing per-channel thermal stress. |
Applications
| AC-to-DC SMPS | DC-to-DC Converters |
|---|---|
Use Scenario: Primary-side synchronous rectification in LLC resonant converters operating at 300–500 kHz. IC Role / Device Role / Timing Role: Low-side gate driver for two parallel N-channel MOSFETs replacing diodes, timed to match resonant tank zero-voltage switching transitions. Use Value: Reduces conduction losses by >40% vs. Schottky diodes while maintaining <2 ns inter-channel timing accuracy for ZVS integrity. | Use Scenario: Dual-phase synchronous buck regulator powering FPGA core voltage (0.8 V/60 A) in telecom baseband cards. IC Role / Device Role / Timing Role: Independent channel control for phase interleaving; OTW signal feeds back to PMBus controller for dynamic frequency scaling under thermal load. Use Value: Enables 95%+ efficiency at full load and real-time thermal derating without external sensors or ADCs. |
| Synchronous Rectification | Motor Drives |
Use Scenario: Secondary-side synchronous rectification in isolated 48 V–12 V DC-DC modules for server power distribution. IC Role / Device Role / Timing Role: Noninverting driver for high-side-referenced N-MOSFETs (with bootstrap or isolated supply), controlled by isolated gate drive transformer signals. Use Value: Achieves <10 ns propagation delay matching across channels, minimizing dead-time uncertainty and preventing cross-conduction. | Use Scenario: Half-bridge gate driving in 24 V BLDC motor inverters for industrial automation actuators. IC Role / Device Role / Timing Role: Low-side driver for bottom FETs in three-phase inverter; SD pin tied to microcontroller fault output for immediate shutdown during overcurrent events. Use Value: 4 A peak drive sustains fast turn-on of 100 V/50 mΩ MOSFETs at 20 kHz PWM, reducing switching losses by 30% vs. 2 A drivers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-side dual MOSFET driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP3624ARDZ | 4.5 V–18 V supply range; lower UVLO (4.2 V typ); same SOIC_N_EP package and pinout. | Better suited for 5 V–12 V systems (e.g., point-of-load converters), not recommended for 12 V+ SMPS with marginal input regulation. | Select ADP3624ARDZ only when supply rail is guaranteed ≥5 V; ADP3634ARDZ preferred for 12 V nominal systems with brownout risk. |
| LM5113SDX/NOPB | 6 A peak drive; 5 V–14 V supply; no integrated OTW/OTSD; requires external thermal monitoring. | Lacks built-in thermal protection and warning flag; needs additional circuitry for safe operation in sealed motor drive enclosures. | Choose LM5113SDX/NOPB only when higher peak current is mandatory and thermal management is handled externally. |
Compared with ADP3624ARDZ, ADP3634ARDZ provides higher UVLO headroom for stable 12 V operation and tighter thermal safety margins; versus LM5113SDX/NOPB, it eliminates external thermal sensing but trades 2 A peak drive for integrated reliability features essential in unattended power systems.
Availability
ADP3634ARDZ is available at Aetrix Electronics and suitable for AC-to-DC switch mode power supplies, DC-to-DC power supplies, and motor drives requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ADP3634ARDZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.
The ADP36xx family was designed specifically for high-efficiency, high-frequency power conversion systems demanding robust gate drive, precise timing, and autonomous thermal safety - targeting server, telecom, and industrial power applications.
FAQ
What is the UVLO turn-on threshold voltage for ADP3634ARDZ?
The ADP3634ARDZ has a guaranteed UVLO turn-on threshold of 8.0 V minimum and 9.5 V maximum, with 8.7 V typical at 25°C. This 9.5 V–18 V operating range ensures reliable startup in 12 V systems even during input dips, and the 1.0 V hysteresis prevents oscillation near the threshold. The specification applies exclusively to the ADP3633/ADP3634/ADP3635 variants, not the ADP362x series.
Does ADP3634ARDZ support parallel operation of its two output channels?
Yes, ADP3634ARDZ supports parallel operation: connect INA and INB together, and tie OUTA and OUTB to a common gate node. This configuration doubles peak drive current to ±8 A and reduces thermal load per channel. Layout must minimize trace length and inductance imbalance between the two paths to ensure equal current sharing - verified in Figure 25 of the ADP3634ARDZ datasheet Rev. B.
What is the function of the OTW pin on ADP3634ARDZ?
The OTW (Overtemperature Warning) pin on ADP3634ARDZ is an open-drain, active-low output that asserts when the die temperature reaches 135 °C (typical). It remains asserted until temperature falls below 125 °C (135 °C − 10 °C hysteresis). Multiple ADP3634ARDZ devices can share a single OTW bus using wire-OR logic, enabling centralized thermal monitoring without additional GPIOs on the host controller.
Can ADP3634ARDZ drive high-side N-channel MOSFETs directly?
No, ADP3634ARDZ is a dedicated low-side driver with outputs referenced to PGND and cannot directly drive high-side N-channel MOSFETs. It lacks a floating high-side supply or level-shifting circuitry. For high-side drive, it must be paired with a bootstrap capacitor network or isolated gate driver supply. Its design intent is strictly for ground-referenced N-MOSFETs in synchronous rectifiers, buck low-side switches, and half-bridge bottom FETs.
What package type and thermal performance does ADP3634ARDZ use?
ADP3634ARDZ uses the 8-lead SOIC_N_EP (RD-8-4) package with exposed thermal pad. Its thermal resistance is 59°C/W (θJA, JEDEC 4-layer board), enabling sustained operation at up to +85°C ambient when properly mounted with soldered exposed pad. This package matches industry-standard footprints and supports reflow-compatible assembly, unlike the MINI_SO_EP variant which offers 43°C/W but different land pattern.
ADP3634ARDZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 9.5V ~ 18V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- 4A, 4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 10ns, 10ns
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC-EP
ADP3634ARDZ FAQ
1.How can I place an order for ADP3634ARDZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP3634ARDZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP3634ARDZ reliable?
The price and inventory of ADP3634ARDZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3634ARDZ is usually 5 days.
3.What payment methods are accepted for ADP3634ARDZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP3634ARDZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP3634ARDZ?
ADP3634ARDZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP3634ARDZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP3634ARDZ?
For technical support, including ADP3634ARDZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3634ARDZ requirements.
6.How does Aetrix verify that ADP3634ARDZ is sourced from the original manufacturer or authorized distributors?
All ADP3634ARDZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3634ARDZ meets industry standards.
7.What is the process for return or replacement of ADP3634ARDZ?
All ADP3634ARDZ units undergo pre-shipment inspection (PSI). If there is an issue with ADP3634ARDZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP3634ARDZ part is unused and in its original packaging.
Return procedure for ADP3634ARDZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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