Analog Devices Inc. ADP3634ARHZ-R7
- Part No.:
- ADP3634ARHZ-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
ADP3634ARHZ-R7.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP3634ARHZ-R7 from Analog Devices is a high-speed, dual-channel, 4 A low-side MOSFET driver with thermal protection, designed for driving two independent N-channel power MOSFETs in switching power supplies. It operates from 9.5 V to 18 V supply, delivers 10 ns typical rise/fall times at 2.2 nF load, and features matched propagation delays (≤2 ns mismatch) and overtemperature warning/shutdown thresholds at 135°C/165°C.
For engineers reviewing the ADP3634ARHZ-R7 datasheet, ADP3634ARHZ-R7 pinout, ADP3634ARHZ-R7 application, or ADP3634ARHZ-R7 equivalent, key selection criteria include its 9.5–18 V UVLO range, 3.3 V-compatible inputs, parallelable dual outputs, open-drain OTW flag, and thermally enhanced MINI_SO_EP package for high-frequency, high-current gate drive in space-constrained designs.
Technical Context
The ADP3634ARHZ-R7 implements dual noninverting low-side drivers with internal pull-downs on INA/INB inputs, enabling robust operation with 3.3 V logic controllers. Its SD input uses a precision comparator with 280 mV hysteresis for reliable shutdown signaling under slow-varying fault conditions like overvoltage or overcurrent.
Thermal protection includes an open-drain OTW output active low at 135°C (typ), plus automatic shutdown at 165°C (typ) with 30°C hysteresis. The device supports parallel operation of both channels to increase peak current capability and reduce per-channel power dissipation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 9.5 V to 18 V - Enables direct use with high-voltage auxiliary rails in AC/DC and isolated DC/DC converters. |
| Rise/Fall Time | 10 ns (typ) @ 2.2 nF - Supports >20 MHz effective switching frequencies with minimal gate drive loss. |
| Peak Output Current | ±4 A - Sufficient to rapidly charge/discharge high-QG MOSFETs (e.g., >100 nC) without external buffers. |
| Propagation Delay Match | ≤2 ns - Ensures synchronous switching of dual-phase or interleaved topologies with minimal timing skew. |
| UVLO Threshold | 8.7 V (typ) turn-on, 7.7 V (typ) turn-off - Provides stable startup/shutdown margin for 12 V bias rails. |
| OTW Threshold | 135°C (typ) - Early warning signal allows system-level thermal derating before critical shutdown at 165°C. |
| Input Logic Compatibility | 3.3 V CMOS/TTL - Direct interface with digital PWM controllers (e.g., ADP10xx, UCD3138) without level shifting. |
Pinout & Package
ADP3634ARHZ-R7 is housed in an 8-lead MINI_SO_EP package with exposed thermal pad, optimized for low θJA = 43°C/W (JEDEC 4-layer board) and compact PCB layout in high-power-density applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SD) | Shutdown control input | Active-high precision comparator input; pulls OUTA/OUTB low when asserted - enables redundant OVP/OCP fault response. |
| 2 (INA) | Channel A input | Noninverting logic input; 3.3 V compatible with internal pull-down - ensures MOSFET stays off if controller signal is floating or lost. |
| 3 (PGND) | Power ground reference | Low-inductance return path tied directly to MOSFET source - critical for minimizing shoot-through and EMI in high-dI/dt switching. |
| 4 (INB) | Channel B input | Noninverting logic input; electrically identical to INA - supports independent or paralleled dual-channel control. |
| 5 (OUTB) | Channel B output | Low-side gate driver output; ±4 A peak sink/source - drives N-MOSFET gates referenced to PGND. |
| 6 (VDD) | Power supply input | 9.5–18 V bias rail; requires local 4.7 µF MLCC + 100 nF ceramic bypass - suppresses supply noise during high di/dt transitions. |
| 7 (OUTA) | Channel A output | Low-side gate driver output; matched delay and drive strength to OUTB - enables precise interleaving in multi-phase converters. |
| 8 (OTW) | Overtemperature warning flag | Open-drain, active-low output - wire-OR'able with other ADP36xx devices for system-level thermal monitoring bus. |
Key Features
| Feature | Design Value |
|---|---|
| Dual noninverting low-side drivers | Enables direct connection to PWM controller outputs without inversion logic - simplifies gate drive circuitry and reduces component count. |
| Matched propagation delays (≤2 ns) | Minimizes timing skew between channels - essential for interleaved buck, phase-shifted full-bridge, and dual-output flyback designs. |
| Overtemperature warning + shutdown | Provides two-tier thermal safety: OTW alerts system controller at 135°C; hard shutdown at 165°C prevents die damage under sustained overload. |
| Industry-standard MINI_SO_EP footprint | Compatible with SOIC-8 land patterns while delivering 43°C/W thermal resistance - eases migration from legacy drivers without PCB redesign. |
| Parallelable outputs | INA/INB tied together and OUTA/OUTB shorted increases effective drive strength to ±8 A - supports higher gate charge MOSFETs or lower RG for faster edges. |
Applications
| AC-to-DC SMPS | Isolated DC-to-DC Converters |
|---|---|
Use Scenario: Primary-side synchronous rectification in LLC resonant converters with 12 V auxiliary bias rail. IC Role / Device Role / Timing Role: Low-side gate driver for dual N-channel SR FETs operating at 300–500 kHz, synchronized to primary-side controller timing. Use Value: 10 ns rise time and matched delays ensure zero-voltage switching (ZVS) integrity across both SR legs, reducing conduction losses by >15% vs. diode rectification. |
Use Scenario: Secondary-side synchronous rectification in 48 V–12 V isolated buck-derived converters for telecom and server PSUs. IC Role / Device Role / Timing Role: Dual-channel driver controlling parallel N-MOSFETs per output leg, interfacing with isolated gate drive signals via optocoupler or digital isolator. Use Value: 4 A peak current sustains fast turn-on of 5 mΩ/100 nC MOSFETs at 1 MHz, while OTW flag enables dynamic load shedding before thermal runaway. |
| Motor Drive Half-Bridge | Industrial PLC Output Modules |
Use Scenario: Gate drive for N-channel half-bridge in 24 V BLDC motor inverters with integrated current sensing. IC Role / Device Role / Timing Role: Low-side driver for bottom FETs in three-phase inverter; SD input linked to controller fault signal for immediate disable. Use Value: 9.5–18 V supply range matches industrial 24 V rail; UVLO hysteresis prevents erratic operation during brownout; 2 ns delay match minimizes cross-conduction risk. |
Use Scenario: Solid-state switching of 24 V DC loads in programmable logic controller output cards with thermal monitoring. IC Role / Device Role / Timing Role: Dual-channel driver enabling independent control of two high-current solenoid or relay loads, with OTW flag feeding back to PLC CPU. Use Value: Open-drain OTW allows centralized thermal alarm across multiple ADP3634ARHZ-R7 units on same bus; MINI_SO_EP footprint saves board space in dense I/O modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-side MOSFET driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP3634ARDZ-RL | Same electrical specs and pinout; differs only in SOIC_N_EP package (θJA = 59°C/W vs. 43°C/W). | Better suited for lower-power or forced-air-cooled designs where thermal pad soldering is not feasible. | Select ADP3634ARDZ-RL when board layout constraints prevent MINI_SO_EP reflow or when existing SOIC-8 footprints must be reused. |
| LM5113SDX/NOPB | 4 A dual driver but with 4.5–14 V supply range, no OTW flag, and 15 ns typical rise time - lacks thermal warning and has narrower UVLO. | Targeted at cost-sensitive industrial motor drives without system-level thermal monitoring requirements. | Choose LM5113SDX/NOPB only if OTW functionality is unnecessary and 12 V bias rail stability falls below 9.5 V during transients. |
Compared with ADP3634ARDZ-RL and LM5113SDX/NOPB, the ADP3634ARHZ-R7 provides superior thermal management via its MINI_SO_EP package and unique dual-level thermal protection - making it the preferred choice for high-reliability, high-density power conversion where junction temperature margins are critical.
Availability
ADP3634ARHZ-R7 is available at Aetrix Electronics and suitable for AC-to-DC switch mode power supplies, isolated DC-to-DC converters, and motor drive half-bridges requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ADP3634ARHZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA, with design centers and manufacturing facilities worldwide.
The ADP36xx family was developed specifically for high-efficiency, high-frequency power conversion systems - emphasizing robust gate drive, thermal resilience, and seamless integration with digital power controllers in server, telecom, and industrial power supplies.
FAQ
What is the UVLO threshold voltage for ADP3634ARHZ-R7?
The ADP3634ARHZ-R7 has a UVLO turn-on threshold of 8.7 V (typical) and turn-off threshold of 7.7 V (typical), with 1.0 V hysteresis. This 9.5–18 V supply range is specifically calibrated for stable operation with 12 V auxiliary rails in AC/DC and isolated DC/DC converters, preventing erratic behavior during brownout conditions.
Does ADP3634ARHZ-R7 support parallel operation of its two output channels?
Yes, ADP3634ARHZ-R7 supports parallel operation: connect INA to INB and OUTA to OUTB to combine both channels into a single 8 A capable driver. This configuration is explicitly validated in the datasheet (Figure 25) and maintains matched timing - ideal for driving high-gate-charge MOSFETs or reducing thermal stress in high-duty-cycle applications.
What is the function of the OTW pin on ADP3634ARHZ-R7?
The OTW (Overtemperature Warning) pin on ADP3634ARHZ-R7 is an open-drain, active-low output that asserts at 135°C (typical) junction temperature. It enables system-level thermal monitoring and graceful derating - for example, reducing PWM duty cycle before reaching the 165°C shutdown threshold - and supports wire-OR'ed bus configurations with multiple ADP36xx devices.
Can ADP3634ARHZ-R7 drive high-side N-channel MOSFETs?
No, ADP3634ARHZ-R7 is a dedicated low-side gate driver only. Its outputs (OUTA/OUTB) are referenced to PGND and lack high-side floating bias generation or level-shifting circuitry. To drive high-side N-MOSFETs, a dedicated high-side or bootstrap driver (e.g., ADP3653) must be used in conjunction with ADP3634ARHZ-R7 for complementary switching stages.
What package type is used for ADP3634ARHZ-R7 and why does it matter?
ADP3634ARHZ-R7 uses the 8-lead MINI_SO_EP package with exposed thermal pad, offering θJA = 43°C/W (JEDEC 4-layer board). This 30% better thermal performance versus SOIC_N_EP enables higher continuous current capability and improved reliability in compact, high-power-density layouts - especially critical in sealed or convection-limited environments.
ADP3634ARHZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 9.5V ~ 18V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- 4A, 4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 10ns, 10ns
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP-EP
ADP3634ARHZ-R7 FAQ
1.How can I place an order for ADP3634ARHZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP3634ARHZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP3634ARHZ-R7 reliable?
The price and inventory of ADP3634ARHZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3634ARHZ-R7 is usually 5 days.
3.What payment methods are accepted for ADP3634ARHZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP3634ARHZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP3634ARHZ-R7?
ADP3634ARHZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP3634ARHZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP3634ARHZ-R7?
For technical support, including ADP3634ARHZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3634ARHZ-R7 requirements.
6.How does Aetrix verify that ADP3634ARHZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP3634ARHZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3634ARHZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP3634ARHZ-R7?
All ADP3634ARHZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP3634ARHZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP3634ARHZ-R7 part is unused and in its original packaging.
Return procedure for ADP3634ARHZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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