Analog Devices Inc. ADP3635ARDZ-RL

Overview

ADP3635ARDZ-RL from Analog Devices is a high-speed, dual-channel, 4 A low-side MOSFET driver with integrated thermal protection and 9.5 V to 18 V supply range. It features matched propagation delays (≤2 ns), 10 ns typical rise/fall times at 2.2 nF load, and an overtemperature warning flag (OTW) for system-level thermal monitoring in synchronous buck converters and motor drives.

For engineers reviewing the ADP3635ARDZ-RL datasheet, ADP3635ARDZ-RL pinout, ADP3635ARDZ-RL application, or ADP3635ARDZ-RL equivalent, key selection criteria include its SOIC_N_EP package with exposed pad, 3.3 V-compatible logic inputs, UVLO threshold of 8.7 V (typ), and dual inverting/noninverting input configuration enabling flexible gate drive control in high-frequency power stages.

Technical Context

The ADP3635ARDZ-RL implements two independent low-side drivers optimized for N-channel MOSFETs, with internal bias referenced to PGND and VDD. Its input stage accepts 3.3 V logic while tolerating up to VDD, and includes an internal pull-down on INA/INB to ensure default-off behavior during floating conditions.

It integrates dual overtemperature protection: an open-drain OTW signal active below 135°C (typ) and automatic shutdown above 165°C (typ), both with defined hysteresis (10°C and 30°C respectively). The SD pin uses a precision comparator with 280 mV hysteresis for reliable fault-triggered disable.

Key Specifications

Pinout & Package

ADP3635ARDZ-RL is housed in an 8-lead SOIC_N_EP (RD-8-4) package with thermally enhanced exposed pad soldered to PCB ground plane for θ_JA = 59°C/W (JEDEC 4-layer board).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-side dual MOSFET driver applications.

Compared with LM5113SDX/NOPB and UCC27524ADDG, ADP3635ARDZ-RL uniquely combines 4 A drive strength, 9.5–18 V operation, OTW signaling, and 1.0 V UVLO hysteresis-enabling self-contained thermal and supply fault response in space-constrained industrial power modules without adding discrete protection circuitry.

Availability

ADP3635ARDZ-RL is available at Aetrix Electronics and suitable for AC/DC power supplies, synchronous buck converters, and motor drive half-bridges requiring stable component supply with full RoHS compliance and traceable lot data.

Supply support for ADP3635ARDZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and power conversion markets since 1965.

The ADP36xx family was engineered specifically for high-frequency, high-reliability power conversion systems-delivering robust gate drive with integrated thermal supervision and industry-standard pinout compatibility for drop-in upgrades in existing designs.

FAQ

What is the recommended PCB layout practice for ADP3635ARDZ-RL to minimize switching noise?

Place the 4.7 µF VDD bypass capacitor within 2 mm of pins 6 (VDD) and 3 (PGND), use short/wide traces (>40 mil) for OUTA/OUTB connections to MOSFET gates, and solder the exposed pad directly to a solid PGND plane with ≥4 thermal vias. This reduces loop inductance, suppresses ringing, and maintains 10 ns rise/fall integrity under 4 A load.

Does ADP3635ARDZ-RL support parallel operation of its two output channels?

Yes, ADP3635ARDZ-RL supports parallel operation: connect INA and INB together, and tie OUTA and OUTB to a common gate node. Layout symmetry is critical-match trace lengths and impedances to ensure balanced current sharing. This configuration doubles effective drive strength to 8 A peak for ultra-high-Qg GaN FETs while maintaining matched propagation delays.

How does the OTW pin function in ADP3635ARDZ-RL, and what external circuitry is needed?

The OTW pin is an open-drain output that pulls low when die temperature exceeds 135°C (typ). It requires an external pull-up resistor (typically 10 kΩ to VDD or logic supply) to generate a logic-high signal in normal operation. Multiple ADP3635ARDZ-RL devices can share one pull-up for system-level thermal alarm aggregation without additional logic gates.

What is the purpose of the SD pin's hysteresis in ADP3635ARDZ-RL, and how is it used in overvoltage protection?

The SD pin's 280 mV hysteresis prevents false triggering during noisy or slowly ramping fault signals. In overvoltage protection, a resistor divider scales the output voltage to 1.28 V at the trip point; hysteresis ensures the driver remains disabled until the scaled voltage falls below 1.0 V, eliminating oscillation during recovery and providing clean system shutdown.

Can ADP3635ARDZ-RL drive both N-channel and P-channel MOSFETs in the same design?

ADP3635ARDZ-RL is designed exclusively for low-side N-channel MOSFETs with source tied to PGND. It cannot directly drive high-side P-channel devices due to lack of floating high-side supply and level-shifting capability. For high-side N-MOSFETs, a dedicated high-side driver or bootstrap circuit is required-ADP3635ARDZ-RL remains optimal for synchronous rectifier or low-side switch roles only.