Analog Devices Inc. ADP3654ARDZ-RL
- Part No.:
- ADP3654ARDZ-RL
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
ADP3654ARDZ-RL.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:6,326
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Product details
Overview
ADP3654ARDZ-RL from Analog Devices is a high-speed dual low-side MOSFET driver IC designed to independently drive two N-channel power MOSFETs in switching power stages. It delivers 4 A peak source/sink current, supports 4.5 V to 18 V supply voltage, achieves 10 ns typical rise/fall times at 2.2 nF load, and operates across −40°C to +125°C junction temperature - enabling use in high-frequency AC/DC and DC/DC converters.
For engineers reviewing the ADP3654ARDZ-RL datasheet, ADP3654ARDZ-RL pinout, ADP3654ARDZ-RL application, or ADP3654ARDZ-RL equivalent, key selection criteria include UVLO threshold (4.2 V typ), matched propagation delays (≤2 ns channel-to-channel skew), parallelable outputs for enhanced drive strength, SOIC_N_EP thermally enhanced package with exposed pad, and 3.3 V-compatible logic inputs for digital controller interfacing.
Technical Context
The ADP3654ARDZ-RL integrates two independent low-side gate drivers with internal pull-downs on INA/INB inputs, ensuring MOSFETs remain off during floating control conditions. Its UVLO circuit features 4.2 V turn-on and 3.9 V turn-off thresholds with 0.3 V hysteresis, enabling safe startup/shutdown sequencing when paired with low-voltage digital controllers.
Each output stage provides symmetrical 4 A peak source and sink capability into capacitive loads, with propagation delays of 14 ns (rising) and 22 ns (falling) at 12 V and 2.2 nF. The device supports parallel operation by tying INA/INB and OUTA/OUTB, increasing effective drive current while maintaining timing integrity under shared load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 4.5 V to 18 V - enables compatibility with both 5 V and 12 V bias rails used in industrial and telecom power supplies. |
| Peak Output Current | ±4 A - sufficient to rapidly charge/discharge high-Qg MOSFETs (e.g., >100 nC) at >300 kHz switching frequencies. |
| Rise/Fall Time | 10 ns typical at 2.2 nF - minimizes switching transition losses and supports >1 MHz operation in resonant topologies. |
| Propagation Delay Matching | ≤2 ns - ensures precise synchronous switching of dual-phase or interleaved converter legs without shoot-through risk. |
| UVLO Threshold | 4.2 V (turn-on), 3.9 V (turn-off) with 0.3 V hysteresis - prevents erratic operation during brown-out or soft-start sequences. |
| Input Logic Compatibility | 3.3 V CMOS/TTL - directly interfaces with FPGA, microcontroller, or digital PWM controller outputs without level-shifting. |
| Operating Temperature | −40°C to +125°C junction - validated for under-hood automotive DC/DC, industrial motor drives, and base station power modules. |
Pinout & Package
The ADP3654ARDZ-RL is housed in an 8-lead SOIC_N_EP (RD-8-4) package with exposed thermal pad, optimized for high-current, high-frequency PCB layouts. The exposed pad must be soldered to PGND plane for optimal thermal performance (θJA = 59°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8 NC | No Connect | Unused pins; must remain unconnected per design - no internal connection or function. |
| 2 INA | Channel A Input | 3.3 V–compatible logic input controlling OUTA; internal pull-down ensures OFF-state default if left floating. |
| 3 PGND | Power Ground | Low-inductance return path for OUTA/OUTB currents; must be tied directly to MOSFET source and exposed pad ground plane. |
| 4 INB | Channel B Input | Independent logic input for OUTB; identical electrical behavior to INA with matched delay characteristics. |
| 5 OUTB | Channel B Output | Low-side gate driver output capable of ±4 A peak current; connects directly to N-MOSFET gate. |
| 6 VDD | Power Supply | 4.5–18 V bias input; requires local 4.7 µF MLCC + 100 nF ceramic bypass to PGND for stable high-speed operation. |
| 7 OUTA | Channel A Output | Matched-output driver to OUTB; enables dual-phase or redundant gate drive configurations. |
| 9 EPAD | Exposed Thermal Pad | Electrically connected to die substrate (PGND); must be soldered to PCB ground plane for thermal conduction and EMI reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Industry-standard pinout | SOIC_N_EP footprint matches legacy dual drivers (e.g., ADP3623), enabling drop-in replacement without PCB redesign. |
| Dual-channel parallel operation | INA/INB and OUTA/OUTB can be shorted to double peak current drive (±8 A) while preserving timing symmetry. |
| Precision UVLO with hysteresis | Guarantees clean enable/disable sequencing between low-voltage digital controllers and high-voltage power stages. |
| Thermally enhanced SOIC_N_EP | Exposed pad reduces θJA to 59°C/W, supporting >800 mW dissipation in compact 5 mm × 6 mm footprint. |
| Matched inter-channel propagation delay | ≤2 ns skew enables accurate interleaving in multi-phase buck or LLC converters without added timing compensation. |
Applications
| AC/DC Switch Mode Power Supplies | DC/DC Synchronous Buck Converters |
|---|---|
Use Scenario: High-efficiency offline flyback or LLC resonant converters delivering 65–300 W in server PSUs or industrial power modules. IC Role / Device Role / Timing Role: Dual low-side driver for primary-side synchronous rectification and secondary-side active clamp control. Use Value: 10 ns rise/fall time and matched delays reduce dead-time uncertainty, improving ZVS margin and efficiency above 92% at full load. | Use Scenario: Multiphase CPU/GPU VRMs in data center servers requiring fast transient response and tight phase current balancing. IC Role / Device Role / Timing Role: Independent gate driver for dual-phase interleaved buck stages operating up to 1 MHz. Use Value: ≤2 ns channel-to-channel delay matching ensures precise phase alignment, minimizing input/output ripple and improving dynamic load regulation. |
| Synchronous Rectification | Motor Drive Half-Bridge Stages |
Use Scenario: Secondary-side rectification in telecom rectifiers and USB PD adapters using GaN or SiC FETs. IC Role / Device Role / Timing Role: Low-side driver for synchronous rectifier FETs in forward or flyback topologies. Use Value: 4 A peak current and 3.3 V logic compatibility allow direct interface with digital controllers, eliminating external level shifters and reducing BOM count. | Use Scenario: 24–48 V BLDC motor inverters in industrial automation and robotics with integrated current sensing. IC Role / Device Role / Timing Role: Gate driver for low-side switches in three-phase half-bridge configurations (two ADP3654ARDZ-RL per inverter). Use Value: −40°C to +125°C rating and robust UVLO ensure reliable operation in thermally demanding motor enclosures without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-side MOSFET driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP3623ARDZ-RL | Lower peak current (2 A), slower rise/fall (15 ns), same SOIC_N_EP package and pinout. | Targeted at <100 kHz, lower-power (<100 W) applications where gate charge is smaller. | Select ADP3623ARDZ-RL only if drive strength and speed requirements are relaxed; not suitable for >200 kHz or high-Qg MOSFETs. |
| LM5113SDX/NOPB | Higher VDD max (20 V), faster propagation (12 ns rising), but no UVLO hysteresis and different pinout (8-pin WSON). | Used in high-input-voltage DC/DC designs where layout space is constrained and thermal pad is not required. | Choose LM5113SDX/NOPB for space-constrained WSON layouts or wider supply range; requires PCB redesign due to non-pin-compatible footprint. |
Compared with ADP3654ARDZ-RL, ADP3623ARDZ-RL offers cost savings at reduced performance, while LM5113SDX/NOPB trades pin compatibility for higher voltage tolerance and smaller footprint - making ADP3654ARDZ-RL optimal for thermally demanding, high-frequency dual-channel applications requiring precision timing and robust sequencing.
Availability
ADP3654ARDZ-RL is available at Aetrix Electronics and suitable for AC/DC switch mode power supplies, DC/DC synchronous buck converters, and motor drive half-bridge stages requiring stable component supply, RoHS-compliant packaging, and guaranteed long-term availability.
Supply support for ADP3654ARDZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The ADP3654ARDZ-RL belongs to Analog Devices' high-speed power driver product line, engineered specifically for high-frequency, high-current gate driving in switched-mode power conversion and motor control systems.
FAQ
What is the UVLO behavior of the ADP3654ARDZ-RL?
The ADP3654ARDZ-RL features a precision undervoltage lockout with 4.2 V typical turn-on threshold and 3.9 V typical turn-off threshold, providing 0.3 V hysteresis. This ensures clean startup and shutdown sequencing when interfaced with low-voltage digital controllers, preventing erratic gate drive during brown-out conditions. The UVLO is fully specified over temperature and validated across the −40°C to +125°C operating range.
Can the ADP3654ARDZ-RL drive both N-channel MOSFETs and IGBTs?
Yes, the ADP3654ARDZ-RL is explicitly designed to drive enhancement-mode N-channel MOSFETs and insulated gate bipolar transistors (IGBTs), as confirmed in the Theory of Operation section of the datasheet. Its ±4 A peak output current and fast switching capability support high-gate-charge devices commonly used in motor drives and industrial inverters.
Is the ADP3654ARDZ-RL pin-compatible with other Analog Devices dual drivers?
Yes, the ADP3654ARDZ-RL uses an industry-standard SOIC_N_EP pinout that matches the ADP3623ARDZ-RL and ADP3634ARDZ-RL families. Pin-for-pin compatibility enables drop-in replacement in existing designs, provided thermal and drive strength requirements are verified - no PCB layout changes are needed for migration from ADP3623ARDZ-RL.
What is the recommended decoupling for the ADP3654ARDZ-RL VDD pin?
Analog Devices specifies a minimum 4.7 µF low-ESR ceramic capacitor (MLCC) placed as close as possible to the VDD and PGND pins, supplemented by a parallel 100 nF high-frequency ceramic capacitor. This dual-capacitor network suppresses supply noise and provides peak current during fast switching transitions, preventing resonance-induced overvoltage on OUTA/OUTB pins.
Does the ADP3654ARDZ-RL support parallel operation of its two channels?
Yes, the ADP3654ARDZ-RL supports parallel operation: INA and INB are tied together, and OUTA and OUTB are connected to drive a single high-current MOSFET gate. This configuration doubles peak current capability to ±8 A while maintaining matched propagation delays, as detailed in Figure 17 and the Parallel Operation section of the datasheet.
ADP3654ARDZ-RL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4.5V ~ 18V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- 4A, 4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 10ns, 10ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC-EP
ADP3654ARDZ-RL FAQ
1.How can I place an order for ADP3654ARDZ-RL through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP3654ARDZ-RL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP3654ARDZ-RL reliable?
The price and inventory of ADP3654ARDZ-RL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3654ARDZ-RL is usually 5 days.
3.What payment methods are accepted for ADP3654ARDZ-RL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP3654ARDZ-RL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP3654ARDZ-RL?
ADP3654ARDZ-RL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP3654ARDZ-RL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP3654ARDZ-RL?
For technical support, including ADP3654ARDZ-RL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3654ARDZ-RL requirements.
6.How does Aetrix verify that ADP3654ARDZ-RL is sourced from the original manufacturer or authorized distributors?
All ADP3654ARDZ-RL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3654ARDZ-RL meets industry standards.
7.What is the process for return or replacement of ADP3654ARDZ-RL?
All ADP3654ARDZ-RL units undergo pre-shipment inspection (PSI). If there is an issue with ADP3654ARDZ-RL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP3654ARDZ-RL part is unused and in its original packaging.
Return procedure for ADP3654ARDZ-RL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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