Allegro MicroSystems AHV85110KNHTR
- Part No.:
- AHV85110KNHTR
- Manufacturer:
- Allegro MicroSystems
- Category:
- Gate Drivers
- Package:
- 12-SMD, No Lead
- Datasheet:
-
AHV85110KNHTR.pdf
- Description:
- IC GATE DRVR HI/LOW SIDE 12SMD
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AHV85110KNHTR from Allegro MicroSystems is a self-powered, single-channel isolated gate driver optimized for E-mode GaN FETs in high-frequency power topologies. It integrates transformer-based isolation with Power-Thru™ technology, delivers 50 ns propagation delay, features separate 2.8 Ω pull-up and 1.0 Ω pull-down outputs, and eliminates external high-side bootstrap or secondary bias supplies. It is used in automotive on-board chargers and totem-pole PFC converters.
For engineers reviewing the AHV85110KNHTR datasheet, AHV85110KNHTR pinout, AHV85110KNHTR application, or AHV85110KNHTR equivalent, key selection considerations include its AEC-Q100 Grade 2 qualification, 100 V/ns CMTI, integrated isolated VSEC bias rail, and NH package's 8.4 mm creepage for reinforced insulation compliance.
Technical Context
The AHV85110KNHTR uses a single transformer-based isolation barrier to simultaneously transfer PWM signal and gate drive power-enabling true self-powered operation on the secondary side. Its open-loop VSEC generation dynamically balances charge delivery with FET gate charge consumption across 100 kHz–1 MHz switching frequencies.
It implements bidirectional EN pin logic for system-level fault coordination, internal UVLO on both VDRV (10.0 V rising threshold) and VSEC (4.4 V rising threshold), and refresh pulses every 12 µs to sustain VSEC during low-frequency or static IN conditions-ensuring robust startup, shutdown, and continuous ON capability without bootstrap recycling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Propagation Delay | 50 ns typical - enables precise timing control in >500 kHz GaN-based LLC and phase-shifted full-bridge converters. |
| Output Drive Strength | Pull-up: 2.8 Ω; Pull-down: 1.0 Ω - delivers >2 A source / >4 A sink peak current into 1 nF load for fast GaN FET switching. |
| Isolation Rating | 5 kV RMS per UL 1577; 8 kV pk VIOTM - supports reinforced insulation in 600 V AC/DC systems with 8.4 mm creepage/clearance. |
| VDRV Operating Range | 10.5 V to 13.2 V - sets gate drive amplitude and directly governs VSEC output level (typically 6–8 V depending on COUT). |
| CMTI | >100 V/ns - ensures reliable operation in high-dv/dt half-bridge nodes without false triggering. |
| Package | NH: 10 mm × 7.66 mm × 2.41 mm, 12-pin surface mount - optimized for thermal performance with dual GND and dual OUTSS pins for PCB plane connection. |
| Qualification | AEC-Q100 Grade 2 (–40°C to +105°C ambient) - validated for automotive EV charger and OBC applications. |
Pinout & Package
The AHV85110KNHTR is housed in a compact 12-pin NH surface-mount package (10 mm × 7.66 mm × 2.41 mm) with reinforced creepage (8.4 mm) and MSL-3 moisture sensitivity rating. Thermal design relies on external connection of GND (pins 1, 6) and OUTSS (pins 7, 9, 10) to respective PCB ground planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (1, 6) | Primary-side ground reference | Internally connected; must be externally tied to primary GND net for thermal and noise control. |
| SEL (2) | Internal configuration | Mandatory tie-high to VDRV; no user functionality - left floating risks undefined behavior. |
| EN (3) | Bidirectional enable | Open-drain; pulled low internally during UVLO/startup to flag readiness; requires 10–100 kΩ external pull-up to VDRV. |
| IN (4) | PWM input | Logic-compatible (0.8 V low / 2.0 V high); includes 400 mV hysteresis and 300 kΩ internal pull-down for noise immunity. |
| VDRV (5) | Primary supply input | 10.5–13.2 V referenced to GND; powers primary circuitry and defines VSEC output amplitude. |
| OUTSS (7, 9, 10) | Secondary-side return | Isolated output ground; must connect externally to secondary GND plane - critical for thermal dissipation and bias stability. |
| VSEC (8) | Isolated bias output | Supplies gate drive power to secondary side; requires 22 nF capacitor to OUTSS - determines VSEC ripple and startup time. |
| OUTPD (11) | Pull-down output | Active-low drive path; sinks up to 4 A peak; used with OUTPU to form bipolar gate drive for GaN FETs. |
| OUTPU (12) | Pull-up output | Active-high drive path; sources up to 2 A peak; complements OUTPD for controlled turn-on/turn-off transitions. |
Key Features
| Feature | Design Value |
|---|---|
| Power-Thru™ integrated bias | Eliminates need for external isolated DC-DC or bootstrap circuitry - reduces BOM count, layout area, and CM EMI by minimizing total isolation capacitance to <1 pF. |
| Continuous ON capability | No requirement to cycle IN or recharge bootstrap capacitor - enables stable operation during 100% duty cycle or low-frequency PWM without VSEC droop-induced failure. |
| Refresh pulse mechanism | 12 µs internal timer recharges VSEC during static IN states - maintains gate bias integrity when driving cascode GaN or during soft-start sequences. |
| Bidirectional EN signaling | Allows shared wired-AND fault bus between controller and multiple drivers - enables coordinated startup, UVLO flagging, and system-level fault recovery without additional logic. |
| Reinforced safety isolation | UL 1577 5 kV RMS, VIOTM 8 kV pk, CTI 400–599 V, Material Group II - certified for use in automotive and industrial 600 V AC/DC systems requiring basic + reinforced insulation. |
Applications
| Automotive On-Board Charger (OBC) | Totem-Pole PFC Converter |
|---|---|
Use Scenario: High-efficiency 11 kW bi-directional OBC using GaN FETs in interleaved totem-pole or dual-active-bridge topologies. IC Role / Device Role / Timing Role: Isolated gate driver providing level-shifted, noise-immune drive to high-side GaN switches with synchronized startup and fault signaling via EN pin. Use Value: Enables AEC-Q100-compliant, 1 MHz switching with <50 ns propagation matching for tight dead-time control and reduced conduction losses. | Use Scenario: Single-phase or three-phase totem-pole PFC stage in server PSUs or industrial motor drives operating at 200–500 kHz. IC Role / Device Role / Timing Role: Self-powered isolated driver eliminating bootstrap complexity while maintaining precise edge alignment between complementary GaN half-bridge legs. Use Value: Reduces common-mode EMI by >10 dB versus discrete isolated driver + DC-DC solutions due to sub-1 pF total isolation capacitance. |
| LLC Resonant Converter | Solar Micro-Inverter |
Use Scenario: High-density 3.3 kW LLC half-bridge or full-bridge in data center power supplies with GaN FETs. IC Role / Device Role / Timing Role: Gate driver delivering fast rise/fall times (9 ns/7 ns) and high CMTI (>100 V/ns) to withstand resonant node dv/dt transients. Use Value: Supports ZVS operation at 700 kHz with minimal gate drive loss - internal 2.8 Ω/1.0 Ω Rds(on) limits power dissipation to <300 mW at 400 kHz/2.4 nF load. | Use Scenario: 300–600 W micro-inverter with GaN half-bridge driving transformer-isolated DC/AC conversion. IC Role / Device Role / Timing Role: Isolated driver enabling compact, high-efficiency topology with integrated VSEC bias - removes need for auxiliary winding or isolated bias IC. Use Value: Achieves >98.5% peak efficiency by eliminating bootstrap diode losses and reducing gate drive loop inductance through direct OUTPU/OUTPD routing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated GaN gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC5870-Q1 | Requires external isolated bias supply; higher 65 ns propagation delay; 150 V/ns CMTI; 16-pin SOIC package. | Targeted at automotive traction inverter gate drive; lacks integrated VSEC and refresh pulse. | Choose UCC5870-Q1 only if higher CMTI and AEC-Q100 Grade 0 qualification are required and external bias supply is acceptable. |
| Si827x Series (e.g., Si8273BD) | Non-self-powered; needs isolated DC-DC for secondary side; 40 ns propagation; 5 kV RMS isolation; 16-pin wide-body SOIC. | General-purpose isolated driver for SiC/MOSFET; no GaN-optimized output impedance or VSEC regulation. | Select Si8273BD when driving SiC FETs or where board space allows discrete bias supply and higher pin count is tolerable. |
Compared with UCC5870-Q1 and Si8273BD, the AHV85110KNHTR uniquely integrates isolated bias generation and refresh logic-reducing component count by ≥3 (bias IC, transformer, filter caps) and enabling smaller, lower-EMI designs specifically for E-mode GaN in automotive and clean energy applications.
Availability
AHV85110KNHTR is available at Aetrix Electronics and suitable for automotive on-board chargers, totem-pole PFC converters, and solar micro-inverters requiring stable component supply, AEC-Q100 compliance, and high-volume GaN gate drive support.
Supply support for AHV85110KNHTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, headquartered in Manchester, NH.
The AHV85110KNHTR belongs to Allegro's Power-Thru™ isolated gate driver family, engineered specifically to simplify high-frequency GaN-based power conversion by integrating signal and power transfer across a single isolation barrier.
FAQ
What is the maximum recommended switching frequency for the AHV85110KNHTR?
The AHV85110KNHTR supports PWM frequencies up to 1 MHz. However, thermal limits depend on gate load capacitance (COUT), ambient temperature, and PCB layout. At 400 kHz with 2.4 nF COUT, typical power dissipation is ~308 mW - requiring derating above 93°C ambient per JEDEC RθJA = 102°C/W. Always verify junction temperature in final layout.
Does the AHV85110KNHTR require an external isolated DC-DC converter?
No. The AHV85110KNHTR uses Allegro's Power-Thru™ technology to generate its isolated VSEC bias rail directly from VDRV via the internal transformer - eliminating all external isolated bias supplies including DC-DC converters and bootstrap networks. Only a 22 nF capacitor between VSEC and OUTSS is required.
How does the AHV85110KNHTR handle startup and UVLO conditions?
At power-on, the AHV85110KNHTR holds EN low until VDRV exceeds 10.0 V (rising UVLO threshold) and internal circuits stabilize (~250 µs). During this time, IN is ignored and outputs remain disabled. If VDRV drops below 9.3 V (falling threshold), EN is pulled low again and outputs shut down - ensuring fail-safe operation throughout the AHV85110KNHTR's operating range.
Can the AHV85110KNHTR drive cascode GaN FETs?
Yes - the AHV85110KNHTR can drive certain Transphorm cascode-GaN devices where the low-voltage MOSFET portion operates at logic-level gate voltages. Its 2.8 Ω pull-up and 1.0 Ω pull-down outputs provide sufficient current to switch the MOSFET gate rapidly. Confirm compatibility using Allegro's online FET selection tool before final design.
What is the purpose of the SEL pin on the AHV85110KNHTR?
The SEL pin on the AHV85110KNHTR is reserved for internal factory configuration and must be tied high to VDRV in all applications. Leaving SEL floating or connecting it to any other voltage violates the device's functional specification and may cause undefined behavior or failure to initialize - the AHV85110KNHTR will not operate correctly unless SEL = VDRV.
AHV85110KNHTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 12-SMD, No Lead
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Driven Configuration:
- High-Side or Low-Side
- Channel Type:
- Single
- Number of Drivers:
- 1
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 10.5V ~ 13.2V
- Logic Voltage - VIL, VIH:
- -
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- -
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- -
AHV85110KNHTR FAQ
1.How can I place an order for AHV85110KNHTR through Aetrix?
Please submit a Request for Quotation (RFQ) for AHV85110KNHTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AHV85110KNHTR reliable?
The price and inventory of AHV85110KNHTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AHV85110KNHTR is usually 5 days.
3.What payment methods are accepted for AHV85110KNHTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AHV85110KNHTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AHV85110KNHTR?
AHV85110KNHTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AHV85110KNHTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AHV85110KNHTR?
For technical support, including AHV85110KNHTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AHV85110KNHTR requirements.
6.How does Aetrix verify that AHV85110KNHTR is sourced from the original manufacturer or authorized distributors?
All AHV85110KNHTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AHV85110KNHTR meets industry standards.
7.What is the process for return or replacement of AHV85110KNHTR?
All AHV85110KNHTR units undergo pre-shipment inspection (PSI). If there is an issue with AHV85110KNHTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AHV85110KNHTR part is unused and in its original packaging.
Return procedure for AHV85110KNHTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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