My Inquiry
My Account
Alpha & Omega Semiconductor Inc. AOZ5239QI
- Part No.:
- AOZ5239QI
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Category:
- Power Driver Modules
- Package:
- 31-PowerVFQFN Module
- Datasheet:
-
AOZ5239QI.pdf
- Description:
- MOD SYNC BUCK POWER STAGE 70A/25
- Quantity:
- Payment:
- Shipping:
Inventory:2,211
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AOZ5239QI from Alpha and Omega Semiconductor is a high-current DrMOS power module integrating asymmetrical high-side and low-side MOSFETs with an integrated gate driver, optimized for synchronous buck conversion in CPU/GPU VRMs. It delivers up to 70A peak output current at 4.5–25V input, supports 2MHz switching, and features pulse skip mode, thermal warning (THWN), and tri-state PWM control - deployed in high-performance desktop and notebook voltage regulation.
For engineers reviewing the AOZ5239QI datasheet, pinout, applications, or equivalent options, key selection considerations include its 5×5 QFN-31L package with optimized VSWH/PIN layout for EMI reduction, bootstrap diode integration, Intel Power State 4 compatibility, and precise zero-cross detection timing for light-load efficiency in VR12/VR13-compliant systems.
Technical Context
The AOZ5239QI implements a dual-MOSFET synchronous buck stage with independently optimized devices: the high-side MOSFET targets low gate charge and capacitance for fast switching at low duty cycles, while the low-side MOSFET achieves ultra-low RDS(on) to minimize conduction loss. Its integrated driver includes non-overlap protection (12–13 ns delays), UVLO (3.1 V threshold), and thermal monitoring with 150°C warning and 180°C shutdown thresholds.
Control logic supports three operational modes via SMOD# pin states: high (enables ZCD-based DCM), low (controller-driven ZCD), and mid-state (internal PWM biasing). The module accepts 3.3V/5V PWM inputs, integrates a bootstrap Schottky diode, and uses separate PVCC (gate drivers) and VCC (logic) rails decoupled with 1µF MLCCs each.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 25V - supports wide-input VRM applications including 12V server and 19V notebook rails. |
| Peak Output Current | 70A - enables single-phase operation for high-power CPU cores or GPU domains without parallel phases. |
| Switching Frequency | Up to 2MHz - allows compact magnetics and high transient response in space-constrained VRMs. |
| Package | 5×5 mm QFN-31L - low-inductance layout with 11 VSWH pins, 4 VIN, 4 PGND, and dedicated PHASE/BOOT routing for minimal EMI. |
| Thermal Warning | 150°C die temperature - open-drain THWN signal alerts controller before thermal shutdown (180°C), enabling proactive throttling. |
| Pulse Skip Mode | Enabled via SMOD# pin - reduces switching losses during light load by disabling low-side MOSFET after zero-current detection. |
| Driver Supply Range | 4.5V to 5.5V (PVCC/VCC) - ensures stable gate drive and logic operation across industrial temperature range (−40°C to +85°C). |
Pinout & Package
AOZ5239QI is housed in a thermally enhanced 5×5 mm QFN-31L package with exposed VIN and PGND pads for optimal power dissipation and low-inductance PCB routing. Pin layout prioritizes minimized loop area for primary (VIN→PHASE→PGND) and secondary (VSWH→inductor→PGND) switching paths.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PWM | Tri-state logic input | Controls HS/LS MOSFET sequencing; mid-state enables internal biasing for ZCD operation. |
| SMOD# | Mode select input | Determines ZCD behavior: high = IC-managed DCM, low = controller-managed ZCD, mid = PWM biasing. |
| VCC / PVCC | Bias & gate driver supplies | VCC powers logic blocks; PVCC powers HS/LS gate drivers - both require local 1µF MLCC to AGND/PGND. |
| BOOT / PHASE | Bootstrap supply path | BOOT connects to external 100nF capacitor; PHASE provides AC return path - must be shorted externally to all VSWH pins. |
| VSWH (Pins 16–26) | Switch node | 11 parallel pins for inductor connection, ZCD sensing, and anti-overlap control - reduces impedance and EMI. |
| THWN | Open-drain thermal warning | Pulled low at 150°C die temp; requires external pull-up for controller interrupt or telemetry. |
| DISB# | Enable/disable control | Pull-down default; driven high to enable driver - 40 µs enable delay ensures clean startup sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bootstrap Schottky diode | Eliminates external diode, reducing BOM count and PCB area while maintaining reliable high-side gate drive at 2MHz. |
| Thermal warning with hysteresis | 150°C activation with 15°C hysteresis prevents chatter; enables firmware-controlled thermal management before shutdown. |
| Non-overlap protection | 12–13 ns fixed dead-time between HS turn-off and LS turn-on prevents shoot-through and improves reliability under transient loads. |
| Tri-state PWM compatibility | Supports 3-level controllers (high/mid/low) for seamless transition into discontinuous conduction mode without external logic. |
| Intel Power State 4 support | Enables deep sleep states in compliant platforms by coordinating low-side gate control and ZCD timing per VR12/VR13 specifications. |
Applications
| Desktop CPU VRM | Notebook GPU Power Stage |
|---|---|
Use Scenario: Primary 1-phase or multi-phase buck converter supplying core voltage to high-end desktop CPUs (e.g., Intel Core i9, AMD Ryzen 9). IC Role / Device Role / Timing Role: DrMOS power stage delivering up to 70A peak current with 2MHz switching for fast transient response to CPU load steps. Use Value: Reduces output capacitance requirements and improves efficiency at light loads via Pulse Skip Mode, extending system battery life in mobile workstations. | Use Scenario: Compact, high-density power delivery for discrete graphics cards in thin-and-light notebooks or gaming laptops. IC Role / Device Role / Timing Role: Single-chip solution replacing discrete driver + MOSFETs, leveraging 5×5 QFN package to minimize board area and thermal footprint. Use Value: Low-profile package with exposed VIN/PGND pads enables direct copper flooding on top layer for efficient heat spreading and reduced thermal resistance (RθJC = 2.5°C/W). |
| Graphics Card VRM | Video Gaming Console SoC Supply |
Use Scenario: High-current, high-efficiency power stage for GPU memory or core voltage rails in PCIe-based graphics accelerators. IC Role / Device Role / Timing Role: Synchronous buck stage operating at 1–2MHz with ZCD-based DCM for dynamic power scaling during rendering workloads. Use Value: Integrated zero-cross detection and thermal warning allow real-time GPU power management without external sense circuitry or thermal sensors. | Use Scenario: Main SoC core voltage regulator in next-generation video game consoles requiring rapid load-step response and thermal headroom. IC Role / Device Role / Timing Role: DrMOS module supporting Intel Power State 4 for low-power idle states and fast wake-up latency in always-on entertainment systems. Use Value: SMOD#-controlled skip mode and 180°C thermal shutdown ensure safe operation under sustained gaming loads while minimizing standby power. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DrMOS power stage applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35201MTRPBF | 6×6 mm QFN-40, 60A continuous, supports 1.2V/150A peak in dual-phase config; no integrated bootstrap diode. | Targets higher-current multi-phase VRMs; requires external bootstrap diode and more complex layout for same performance. | Choose IR35201MTRPBF when designing >70A systems needing phase interleaving or higher peak current headroom. |
| MP86957GQZ | 5×5 mm QFN-32, 70A peak, 1.5MHz max frequency, integrated bootstrap diode, but lacks THWN pin and ZCD mid-state flexibility. | Optimized for cost-sensitive consumer notebooks; missing thermal warning telemetry limits advanced thermal management. | Choose MP86957GQZ where thermal telemetry is not required and 1.5MHz switching suffices for target transient response. |
Compared with IR35201MTRPBF and MP86957GQZ, the AOZ5239QI uniquely combines 70A peak current, 2MHz operation, integrated bootstrap diode, and THWN/SMOD# configurability in a 5×5 mm footprint - making it optimal for space-constrained, thermally aware VRMs requiring full ZCD control and Intel PS4 compliance.
Availability
AOZ5239QI is available at Aetrix Electronics and suitable for desktop CPU VRMs, notebook GPU power stages, graphics card voltage regulation, and video gaming console SoC supplies requiring stable component supply and long-term production continuity.
Supply support for AOZ5239QI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Alpha and Omega Semiconductor (AOS) is a fabless power semiconductor company specializing in MOSFETs, IGBTs, and power modules for high-efficiency power conversion.
The AOZ5239QI belongs to AOS's DrMOS product line, engineered specifically for high-current, high-frequency CPU/GPU voltage regulator modules in computing and gaming platforms demanding low EMI, thermal intelligence, and Intel VR12/VR13 compliance.
FAQ
What is the maximum recommended switching frequency for AOZ5239QI?
The AOZ5239QI supports operation up to 2MHz, as specified in its Recommended Operating Conditions. This maximum frequency enables compact magnetic design and fast transient response in high-performance VRMs. Operation above 2MHz is not characterized and may compromise efficiency, thermal performance, or reliability due to increased switching losses and gate drive limitations. Always verify stability and thermal margin at 2MHz using the manufacturer's demo board layout guidelines.
How does the AOZ5239QI implement zero-current detection (ZCD)?
The AOZ5239QI implements zero-current detection using its VSWH pins to monitor the switch-node voltage relative to a −6 mV threshold. When PWM transitions to mid-state and SMOD# is high, the device initiates a 330 ns blanking+debounce window, then monitors VSWH; once it exceeds the ZCD threshold, the low-side MOSFET is turned off to prevent reverse conduction. This function is integral to Pulse Skip Mode and requires proper PCB routing of all 11 VSWH pins to the inductor and PHASE pin.
What is the purpose of the SMOD# pin on AOZ5239QI?
The SMOD# pin on AOZ5239QI selects ZCD operational mode: high enables internal ZCD for DCM, low delegates ZCD to the controller, and mid-state biases the PWM pin internally. It has a 470 kΩ pull-up to VCC, allowing safe default operation when left unconnected. This pin directly determines whether AOZ5239QI or the controller manages light-load efficiency - critical for VR12/VR13 compliance and Intel Power State 4 support.
Can AOZ5239QI operate with a 3.3V PWM input signal?
Yes, AOZ5239QI supports 3.3V PWM inputs. Its PWM input high threshold is 2.65V (min), and low threshold is 0.7V (max), ensuring reliable recognition of standard 3.3V logic levels. The device also supports 5V PWM and exhibits tri-state compatibility - meaning it interprets floating (mid-state) PWM as a command to enter discontinuous conduction mode when SMOD# is configured appropriately.
What thermal protection features does AOZ5239QI provide?
The AOZ5239QI provides two-tier thermal protection: a thermal warning output (THWN) that pulls low at 150°C die temperature with 15°C hysteresis, and thermal shutdown that disables both MOSFETs at 180°C with 25°C hysteresis. THWN is an open-drain signal requiring an external pull-up resistor, enabling host controllers to initiate throttling before shutdown. Both thresholds are measured at the driver die and are fully characterized across temperature.
AOZ5239QI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Series:
- -
- Package/Case:
- 31-PowerVFQFN Module
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Type:
- MOSFET
- Configuration:
- 1 Phase
- Current:
- 50 A
- Voltage:
- -
- Voltage - Isolation:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
AOZ5239QI FAQ
1.How can I place an order for AOZ5239QI through Aetrix?
Please submit a Request for Quotation (RFQ) for AOZ5239QI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AOZ5239QI reliable?
The price and inventory of AOZ5239QI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AOZ5239QI is usually 5 days.
3.What payment methods are accepted for AOZ5239QI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AOZ5239QI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AOZ5239QI?
AOZ5239QI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AOZ5239QI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AOZ5239QI?
For technical support, including AOZ5239QI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AOZ5239QI requirements.
6.How does Aetrix verify that AOZ5239QI is sourced from the original manufacturer or authorized distributors?
All AOZ5239QI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AOZ5239QI meets industry standards.
7.What is the process for return or replacement of AOZ5239QI?
All AOZ5239QI units undergo pre-shipment inspection (PSI). If there is an issue with AOZ5239QI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AOZ5239QI part is unused and in its original packaging.
Return procedure for AOZ5239QI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AOZ5239QI Tags
-
IGCM15F60GAXKMA1
Infineon Technologies
-
FSBB30CH60C
onsemi
-
LMG3522R030RQSR
Texas Instruments
-
LMG3522R030QRQSTQ1
Texas Instruments
-
IM828XCCXKMA1
Infineon Technologies
-
2SP0430T2A0C-FF1800R17IP5
Power Integrations
.jpg)
-
FBS-GAM02-P-C50
EPC Space, LLC
-
AOZ5507QI_2
Alpha & Omega Semiconductor Inc.
-
AOZ5517QI_2
Alpha & Omega Semiconductor Inc.
-
NV6117-RA
Navitas Semiconductor, Inc.
-
FDMF5062
onsemi
-
NV6127
Navitas Semiconductor, Inc.
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
