Microchip Technology AT43USB370E-AC

Overview

AT43USB370E-AC from Microchip (formerly Atmel) is a USB 2.0 Full-Speed dual-role host/function processor in 100-pin LQFP, integrating dedicated USB controller (USBC) and system interface controller (SIC) microcontrollers, 32-bit DMA-capable system bus interface, and on-chip USB transceiver with SIE. It enables autonomous USB host operation-supporting up to 7 concurrent devices-and real-time host/function switching for embedded point-to-point connectivity.

For engineers reviewing the AT43USB370E-AC datasheet, AT43USB370E-AC pinout, AT43USB370E-AC application, or AT43USB370E-AC equivalent, key selection considerations include its dual-mode firmware architecture, 6 MHz crystal + PLL clocking, 1.8 V/3.3 V dual-supply operation, and memory-mapped 32-bit system interface with 2 KB FIFO and DMA support.

Technical Context

The AT43USB370E-AC implements USB protocol layers via split firmware: USBC handles low-level enumeration, frame management, transaction scheduling, and hub control; SIC manages high-level data flow, packet construction, retry handling, and ANSI C API abstraction. Both controllers share a unified 32-bit register map accessible as memory-mapped peripherals.

Hardware includes a full-speed USB transceiver (12 Mbps), Serial Interface Engine (SIE) with NRZI encoding/decoding, CRC generation/checking, bit stuffing, and SOF generation; plus dedicated TX/RX buffers for host and function modes, and dynamic 2 KB data FIFO partitioning (1 KB IN/1 KB OUT in function mode; 1 KB TX/1 KB RX in host mode).

Key Specifications

Pinout & Package

AT43USB370E-AC is housed in a 100-pin LQFP package with exposed thermal pad (not electrically connected). Pin functions are validated per Atmel AT43USB370 Rev. 3340B datasheet, including dedicated system bus (A[7:0], D[31:0]), USB physical layer (DP/DM), clock/control (XTAL1/XTAL2, CLK_SEL, RESET_N), and JTAG debug (TCK/TMS/TDI/TDO/TRST_N) signals.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB dual-role processor applications.

Compared with CY7C67200 and ISP1583, the AT43USB370E-AC uniquely combines autonomous dual-role operation, real-time mode switching, and ANSI C driver abstraction in a single 100-pin LQFP-reducing firmware development effort and eliminating dual-IC coordination overhead in resource-constrained embedded systems.

Availability

AT43USB370E-AC is available at Aetrix Electronics and suitable for industrial HMI, medical diagnostics, automotive test equipment, and embedded data loggers requiring stable component supply and long-term lifecycle support.

Supply support for AT43USB370E-AC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full support for legacy Atmel USB products including the AT43USB370E-AC.

The AT43USB370E-AC belongs to Atmel's embedded USB processor family, designed specifically to offload USB protocol complexity from resource-limited host microcontrollers in cost-sensitive, space-constrained embedded systems.

FAQ

What USB speeds does the AT43USB370E-AC support?

The AT43USB370E-AC supports USB 2.0 Full-Speed operation at 12 Mbps only. It does not support Low-Speed (1.5 Mbps) or High-Speed (480 Mbps) modes. Its transceiver, SIE, and firmware stack are optimized exclusively for Full-Speed signaling, confirmed by electrical specifications, timing diagrams, and register-level endpoint configuration limits in the datasheet.

Does the AT43USB370E-AC require external USB termination resistors?

Yes, the AT43USB370E-AC requires external 15 Ω series resistors on DP and DM lines close to the USB connector, as specified in Section 6 of the AT43USB370 Rev. 3340B datasheet. The internal RPD_EN and RPU_EN outputs control pull-down and pull-up resistors, but physical layer impedance matching relies on discrete external components.

Can the AT43USB370E-AC operate without an external crystal?

No-the AT43USB370E-AC requires either a 6 MHz crystal across XTAL1/XTAL2 (with LFT RC filter) or a 48 MHz external clock applied to XTAL1 with CLK_SEL = high. The internal PLL has no standalone oscillator; all timing-critical USB functions depend on this clock source, and operation fails if neither configuration is implemented.

How is firmware loaded into the AT43USB370E-AC after power-up?

Firmware is loaded in-system via the 32-bit parallel interface using dedicated control signals: SELECT chooses USBC or SIC, PROG initiates programming, READY confirms write readiness, and DONE completes each 32-bit word transfer. The process downloads SRAM-resident firmware for both controllers before normal operation begins, as detailed in Section 9 of the AT43USB370 Rev. 3340B datasheet.

What is the maximum number of USB endpoints supported in function mode on the AT43USB370E-AC?

In function mode, the AT43USB370E-AC supports 1 bi-directional control endpoint plus up to 6 additional programmable endpoints (IN or OUT), configurable for control, interrupt, bulk, or isochronous transfers. Endpoint type, direction, and maximum packet size (up to 64 bytes) are set dynamically via control registers, consistent with USB 2.0 Full-Speed specification limits.