Microchip Technology AT43USB380E-AI

Overview

AT43USB380E-AI from Atmel (now Microchip) is a USB 2.0 Full-Speed Host/Function Processor with integrated On-The-Go (OTG) interface, supporting Host Negotiation Protocol (HNP) and Session Request Protocol (SRP). It operates as a single-chip USB controller in host or peripheral mode, requires external AT43CD001 charge pump for OTG session negotiation and VBUS power delivery, and features configurable 8/16/32-bit host processor interface for ARM-based embedded systems.

For engineers reviewing the AT43USB380E-AI datasheet, AT43USB380E-AI pinout, AT43USB380E-AI application, or AT43USB380E-AI equivalent, key selection considerations include OTG interface signal mapping (ID, SESS_VLD, DISCHARGE), firmware-compatible upgrade path from AT43USB370, GPIO multiplexing capability (up to 16 pins), and system clock synchronization via SYS_CLK and WAIT_N.

Technical Context

The AT43USB380E-AI implements a hardware-accelerated USB 2.0 Full-Speed (12 Mbps) transceiver with integrated OTG state machine and SRP/HNP protocol engines. Its on-chip OTG interface includes dedicated signals-ID, SESS_VLD, SESS_END, SESS_HIGH, SESS_LOW, DISCHARGE, PUMP_EN, LOW_CUR, and EN-for role detection and VBUS control during OTG sessions.

It supports three host interface widths (8/16/32-bit) selected by BWIDTH[1:0], eliminates legacy handshaking signals (PROG, SEL, READY, DONE, MORE, INTR_IN), and replaces them with direct register access over D[31:0]/GPIO[15:0] and simplified control (CS_N, OE_N, WE_N, DREQ_N, DACK_N, INTR_OUT).

Key Specifications

Pinout & Package

AT43USB380E-AI is housed in a 100-pin TQFP package (14 mm × 14 mm, 0.5 mm pitch) with exposed thermal pad. Power distribution includes 5× VDD, 10× VSS, and 3× VDD18 pins for robust decoupling and noise immunity in embedded USB applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB OTG controller applications.

Compared with AT43USB370, the AT43USB380E-AI adds OTG capability and interface flexibility but retains firmware compatibility; compared with ISP1301, it integrates host interface and GPIOs, reducing system-level complexity and component count in ARM-based embedded USB designs.

Availability

AT43USB380E-AI is available at Aetrix Electronics and suitable for portable medical devices, industrial handheld terminals, and automotive infotainment bridges requiring stable component supply, long-term lifecycle support, and USB 2.0 Full-Speed OTG functionality.

Supply support for AT43USB380E-AI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (acquired by Microchip Technology in 2016) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and USB interface solutions for embedded systems.

The AT43USB380E-AI belongs to Atmel's USB Host/Function Processor product line, designed specifically to simplify USB OTG implementation in resource-constrained ARM-based devices without requiring external protocol stack processors.

FAQ

What is the primary function of the AT43USB380E-AI in an embedded system?

The AT43USB380E-AI serves as a USB 2.0 Full-Speed Host/Function Processor with integrated On-The-Go (OTG) interface. It enables dual-role USB connectivity-acting as either host or peripheral-while offloading USB protocol handling (including HNP and SRP) from the main ARM processor. The AT43USB380E-AI manages physical layer signaling, VBUS control via external charge pump, and register-level communication with the host system through its configurable parallel interface.

Does the AT43USB380E-AI require an external charge pump, and why?

Yes, the AT43USB380E-AI requires an external charge pump such as the AT43CD001 to implement USB OTG functionality. The AT43USB380E-AI provides control signals (DISCHARGE, PUMP_EN, LOW_CUR, EN, SESS_VLD, etc.) but does not generate or regulate VBUS voltage internally. The external charge pump supplies VBUS power during host-mode operation and performs session negotiation signaling, fulfilling the electrical requirements defined in the USB OTG specification.

How does the AT43USB380E-AI differ from the AT43USB370 in terms of pin compatibility?

The AT43USB380E-AI is not pin-compatible with the AT43USB370 due to added OTG interface pins (ID, SESS_VLD, DISCHARGE, PUMP_EN, etc.) and reassignment of D[31:16] to support GPIO multiplexing. While many system interface pins (CS_N, D[15:0], SYS_CLK, INTR_OUT) remain functionally aligned, the AT43USB380E-AI requires PCB layout changes-including routing for new OTG signals and updated power decoupling-to replace AT43USB370 in an existing design.

Can the AT43USB380E-AI operate without an external crystal oscillator?

Yes, the AT43USB380E-AI supports both crystal (XTAL1/XTAL2) and external clock input modes via the CLK_SEL pin. When CLK_SEL is asserted, the device accepts a single-ended external clock signal instead of relying on a crystal resonator. This allows flexibility in timing source selection depending on system-level clock architecture, though the external clock must meet USB Full-Speed jitter and stability requirements.

What GPIO capabilities does the AT43USB380E-AI provide, and how are they enabled?

The AT43USB380E-AI provides up to 16 GPIOs multiplexed with the upper data bus (D[31:16]/GPIO[15:0]). These pins become available as general-purpose I/O only when the host interface width is configured to 8-bit (BWIDTH[1:0]=00) or 16-bit (BWIDTH[1:0]=01) mode. Firmware accesses them via dedicated high-level APIs; no additional hardware configuration beyond BWIDTH pin strapping is required to activate GPIO functionality.