Microchip Technology AT97SC3204-U4A13-10
- Part No.:
- AT97SC3204-U4A13-10
- Manufacturer:
- Microchip Technology
- Category:
- Application Specific Microcontrollers
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT97SC3204-U4A13-10.pdf
- Description:
- IC CRYPTO TPM LPC 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT97SC3204-U4A13-10 from Microchip Technology (formerly Atmel) is a Trusted Platform Module (TPM) IC compliant with TCG TPM 1.2 and LPC Interface Specification v1.2, featuring an AVR RISC microprocessor, hardware RSA crypto engine (2048-bit signature in 200ms), FIPS 140-2-compliant RNG, and 1756-byte NV user storage. It operates at 3.3V on a 33MHz LPC bus and targets PC motherboard security subsystems.
For engineers reviewing the AT97SC3204-U4A13-10 datasheet, AT97SC3204-U4A13-10 pinout, AT97SC3204-U4A13-10 application, or AT97SC3204-U4A13-10 equivalent, key selection considerations include LPC interface timing compliance, industrial temperature range (-40°C to +85°C), 40-pin QFN package, secure key storage in internal EEPROM, and GPIO-Express-00 support for platform-specific control signals.
Technical Context
The AT97SC3204-U4A13-10 implements a complete TCG-compliant TPM stack in silicon, integrating an 8-bit AVR CPU, dedicated cryptographic accelerator for RSA and SHA-1 (20μs/64-byte block), and physical security circuitry. It uses dynamic internal memory management for RSA key caching without host intervention beyond standard TCG commands like TPM_LoadKey2.
LPC interface operation includes SIRQ for interrupt signaling and CLKRUN# for clock gating during low-power states-enabling power-aware designs in mobile PCs. The device supports both commercial and industrial temperature grades, with the -U4A13-10 variant specifically configured for industrial operation and packaged in a 40-pad QFN (40ML1).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| TCG Compliance | TPM 1.2 and PC Client TIS v1.2 - ensures interoperability with BIOS, OS drivers, and management software across Windows/Linux platforms. |
| RSA Performance | 2048-bit signature in 200ms - enables secure boot attestation and full-disk encryption key sealing within real-time constraints. |
| RNG Certification | FIPS 140-2 compliant - provides cryptographically secure entropy for key generation and protocol nonces without external seeding. |
| LPC Interface | 33MHz clock, LAD[0:3], LFRAME#, SERIRQ, CLKRUN# - matches Intel/AMD chipset LPC timing requirements with no glue logic needed. |
| Nonvolatile Storage | 1756 bytes user-defined NV space - supports persistent policy settings, sealed data blobs, and platform configuration registers (PCRs). |
| Operating Range | -40°C to +85°C - qualified for industrial embedded systems including ruggedized PCs, thin clients, and edge servers. |
| Supply Voltage | 3.3V ±10% - compatible with standard PC motherboard VCC_LPC rail; SB3V standby supply enables retention during S3/S4 sleep states. |
Pinout & Package
AT97SC3204-U4A13-10 is housed in a 40-pad QFN package (6.0 mm × 6.0 mm body, 0.50 mm pitch, 0.9 mm max height), designated 40ML1 per Atmel ordering nomenclature. Pin 1 is marked by a corner pad indicator on the bottom view.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Main power supply input | 3.3V core and I/O supply; decoupling required per LPC interface stability guidelines. |
| SB3V | Standby power supply | Maintains RTC-like state and SRAM retention during system suspend (S3/S4); isolated from VCC. |
| LAD0–LAD3 | LPC bidirectional data/address lines | Time-multiplexed command/address/data bus; requires pull-up resistors per LPC spec. |
| LCLK | LPC clock input | 33MHz system clock sourced from chipset; jitter tolerance ≤ ±100 ppm for reliable frame synchronization. |
| LFRAME# | LPC frame strobe | Active-low signal indicating start/end of LPC transaction cycle; synchronous with LCLK. |
| SERIRQ | Serialized interrupt request | Open-drain shared interrupt line supporting multiple LPC devices; requires external pull-up. |
| CLKRUN# | PCI clock run control | Enables dynamic clock gating for power savings; asserted by host to stop LCLK during idle periods. |
| GPIO-Express-00 | Configurable general-purpose I/O | Assigned to TPM_NV_INDEX_GPIO_00 per firmware mapping; usable for platform-specific status signaling or reset coordination. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware crypto engine | Dedicated RSA/SHA-1 accelerator offloads CPU and prevents software-side timing attacks on key operations. |
| Internal EEPROM key storage | Secure, tamper-resistant nonvolatile memory for private keys - immune to cold-boot or DMA-based extraction. |
| Dynamic key cache management | Automatic loading/unloading of RSA keys using TPM_FlushSpecific and TPM_LoadKey2 - eliminates host driver complexity. |
| Physical security circuitry | Active mesh shielding, voltage/glitch/frequency sensors, and bus encryption prevent probing and fault injection attacks. |
| LPC power management support | CLKRUN# and SIRQ enable full ACPI-compliant power state transitions (S0–S5) without firmware workarounds. |
Applications
| Secure Boot Validation | Full-Disk Encryption Key Sealing |
|---|---|
|
Use Scenario: Verifying integrity of bootloader, kernel, and initramfs before execution during system power-on. IC Role / Device Role / Timing Role: TPM as root-of-trust measurement anchor; records PCR values after each stage and signs final hash with endorsement key. Use Value: Prevents unauthorized firmware modification; AT97SC3204-U4A13-10's 2048-bit RSA signing and FIPS 140-2 RNG ensure cryptographic strength meets NIST SP 800-155 requirements. |
Use Scenario: Binding disk encryption keys to platform state so decryption fails if boot components are altered. IC Role / Device Role / Timing Role: TPM performs asymmetric key wrapping/unwrapping and PCR-bound sealing; leverages internal NV storage for sealed blob persistence. Use Value: Enables BitLocker and LUKS integration; AT97SC3204-U4A13-10's 1756-byte NV space accommodates multiple sealed keys and policy metadata. |
| Platform Configuration Register (PCR) Logging | Remote Attestation for Edge Devices |
|
Use Scenario: Capturing runtime measurements of firmware, hypervisor, and OS modules into extendable SHA-1 registers. IC Role / Device Role / Timing Role: TPM acts as immutable log accumulator; each PCR extends with new hash via SHA-1 accelerator (20μs/block). Use Value: Provides verifiable evidence of system state; AT97SC3204-U4A13-10's hardware-accelerated SHA-1 ensures logging overhead remains below 100μs per event. |
Use Scenario: Proving device identity and software integrity to cloud services during onboarding or firmware update. IC Role / Device Role / Timing Role: TPM generates signed quotes containing PCR values and nonce using endorsement key; transmitted over TLS-secured channel. Use Value: Supports zero-touch provisioning; AT97SC3204-U4A13-10's industrial temp rating and QFN package enable deployment in uncontrolled edge environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TPM security module applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon SLB9670 | TPM 2.0 compliant; supports ECC and SHA-256; higher RSA-2048 speed (≈150ms); 32-pin QFN package. | Required for Windows 11 and newer UEFI Secure Boot policies; lacks GPIO-Express-00 but adds SPI interface option. | Select when upgrading to TPM 2.0 mandates or requiring ECC-based attestation; not drop-in compatible due to protocol and pinout differences. |
| NXP PTFT2100 | TPM 1.2 compliant; same 33MHz LPC interface; 28-pin TSSOP package; lower NV storage (1024 bytes); commercial temp only (0°C to 70°C). | Suitable for cost-sensitive desktop motherboards where industrial temp and extended NV are not required. | Choose for legacy BIOS platforms with space-constrained layouts favoring TSSOP; AT97SC3204-U4A13-10 offers superior thermal range and storage for industrial use cases. |
Compared with SLB9670 and PTFT2100, the AT97SC3204-U4A13-10 delivers industrial-grade reliability and larger NV capacity in a compact QFN, making it optimal for ruggedized PCs and edge infrastructure where TPM 1.2 suffices and long-term availability matters.
Availability
AT97SC3204-U4A13-10 is available at Aetrix Electronics and suitable for secure boot validation, full-disk encryption key sealing, and remote attestation requiring stable component supply across industrial computing, thin client deployments, and embedded server platforms.
Supply support for AT97SC3204-U4A13-10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full support for legacy Atmel security products. It is a global leader in microcontrollers, analog, and security ICs with ISO 9001-certified manufacturing.
The AT97SC3204-U4A13-10 belongs to Atmel's TPM product line, designed specifically for PC and embedded platform manufacturers needing certified, turnkey hardware-rooted trust anchored to TCG standards.
FAQ
What is the operating temperature range for the AT97SC3204-U4A13-10?
The AT97SC3204-U4A13-10 is rated for industrial operation from -40°C to +85°C. This specification is confirmed in the Atmel ordering information addendum and validated across all 40ML1 QFN units shipped under the -U4A13-10 suffix. The device maintains full TCG 1.2 functionality-including RSA signing, RNG output, and LPC communication-within this range without derating.
Does the AT97SC3204-U4A13-10 support TPM 2.0?
No, the AT97SC3204-U4A13-10 implements only TCG TPM 1.2 and associated specifications (TIS v1.2). It does not support TPM 2.0 algorithms (ECC, SHA-256), command sets, or authorization structures. For TPM 2.0 compliance, Microchip recommends the SLB9670 or newer CEC1702-based solutions-not the AT97SC3204-U4A13-10.
What package type is used for the AT97SC3204-U4A13-10?
The AT97SC3204-U4A13-10 uses a 40-pad Very-thin Quad Flat No Lead (VQFN) package, designated 40ML1, with 6.0 mm × 6.0 mm body size, 0.50 mm pitch, and 0.9 mm maximum height. This is explicitly defined in Atmel's ordering code documentation and matches the mechanical drawings in the summary datasheet.
How much nonvolatile user storage does the AT97SC3204-U4A13-10 provide?
The AT97SC3204-U4A13-10 provides 1756 bytes of user-defined nonvolatile storage space, allocated in the TPM's NV area. This capacity is reserved for platform-specific data such as sealed keys, policy objects, and configuration parameters-and is accessible only via authenticated TCG commands.
Is the AT97SC3204-U4A13-10 pin-compatible with other AT97SC3204 variants?
No-the AT97SC3204-U4A13-10 uses the 40-pin QFN (40ML1) package, while other variants like AT97SC3204-MA13-10 use 28-pin TSSOP packages. Pin count, layout, and thermal pad configuration differ fundamentally; PCB redesign is required when substituting between these packages. The AT97SC3204-U4A13-10 pinout is unique to the 40ML1 footprint.
AT97SC3204-U4A13-10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- CryptoController™
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Trusted Platform Module (TPM)
- Core Processor:
- AVR
- Program Memory Type:
- EEPROM
- Controller Series:
- -
- RAM Size:
- -
- Interface:
- LPC
- Number of I/O:
- -
- Voltage - Supply:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP
AT97SC3204-U4A13-10 FAQ
1.How can I place an order for AT97SC3204-U4A13-10 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT97SC3204-U4A13-10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT97SC3204-U4A13-10 reliable?
The price and inventory of AT97SC3204-U4A13-10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT97SC3204-U4A13-10 is usually 5 days.
3.What payment methods are accepted for AT97SC3204-U4A13-10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT97SC3204-U4A13-10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT97SC3204-U4A13-10?
AT97SC3204-U4A13-10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT97SC3204-U4A13-10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT97SC3204-U4A13-10?
For technical support, including AT97SC3204-U4A13-10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT97SC3204-U4A13-10 requirements.
6.How does Aetrix verify that AT97SC3204-U4A13-10 is sourced from the original manufacturer or authorized distributors?
All AT97SC3204-U4A13-10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT97SC3204-U4A13-10 meets industry standards.
7.What is the process for return or replacement of AT97SC3204-U4A13-10?
All AT97SC3204-U4A13-10 units undergo pre-shipment inspection (PSI). If there is an issue with AT97SC3204-U4A13-10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT97SC3204-U4A13-10 part is unused and in its original packaging.
Return procedure for AT97SC3204-U4A13-10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT97SC3204-U4A13-10 Tags

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