Monolithic Power Systems Inc. AX5689GRK-P

Overview

AX5689GRK-P from Monolithic Power Systems is a 4-channel BTL digital Class-D amplifier controller IC with 8 low-latency ADCs (115 dB DR), 8 programmable digital loop-filter slices, and 8 CMOS-level PWM outputs configurable as 4 BTL channels. It enables feedback-based digital control loops across loudspeaker nodes for error suppression in the audio band (20 Hz–20 kHz), targeting high-resolution audio systems requiring pop-free transitions and MIMO-capable signal routing.

For engineers reviewing the AX5689GRK-P datasheet, AX5689GRK-P pinout, AX5689GRK-P application, or AX5689GRK-P equivalent, key selection criteria include its 32–768 kHz I²S/TDM input support, 1.2 V analog/digital core supplies, 3.3 V PWM/IO domains, 8-channel differential ADC architecture, and dual-control interface (SPI/I²C) for embedded audio subsystem integration.

Technical Context

The AX5689GRK-P implements a fully digital, multi-slice control architecture where each of eight independent loop-filter slices can be interconnected with any of eight low-latency ADCs to form custom closed-loop paths-enabling post-filter feedback across speaker terminals. Its butterfly mixer supports dynamic reconfiguration of signal paths for MIMO control and analog auxiliary sensing (e.g., current, temperature).

It features dual-domain clocking: a 45.1584–49.152 MHz master clock (MCLK) synchronizes internal DSP and ADC timing, while separate frame/bit clocks (FCLKI/BCLKI up to 768 kHz / 49.152 MHz) manage serial audio I/O. Loop latency is minimized to one MCLK cycle between analog input change and PWM output update.

Key Specifications

Pinout & Package

AX5689GRK-P is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignment follows MPS standard layout for analog/digital domain separation, with dedicated supply/ground rails per functional block (analog, digital core, IO, PWM1, PWM2).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital audio amplifier controller applications.

Compared with TAS5825M and MAX98927, AX5689GRK-P uniquely delivers 8 ADCs, full MIMO interconnect, isolated PWM domains, and true post-filter digital loop control-making it the only option for high-channel-count, high-fidelity, feedback-driven audio subsystems demanding design scalability and measurement-grade performance.

Availability

AX5689GRK-P is available at Aetrix Electronics and suitable for TV sound-bars, active loudspeakers, and high-resolution streaming audio systems requiring stable component supply during transition to the pin-compatible AX5689C replacement.

Supply support for AX5689GRK-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management and audio ICs, with global design centers and ISO 9001-certified operations.

The AX5689 product line was engineered for high-fidelity, digitally controlled Class-D audio systems-emphasizing low-latency feedback, multi-channel flexibility, and seamless integration with third-party power stages in premium consumer and professional audio equipment.

FAQ

What does "END OF LIFE, REFER TO AX5689C" mean for AX5689GRK-P?

AX5689GRK-P is officially discontinued by MPS; the AX5689C is its direct, pin- and register-compatible successor with identical functionality and enhanced manufacturing yield. Aetrix maintains legacy stock for ongoing production support and offers migration guidance, including updated reference schematics and firmware patches for the C revision.

Can AX5689GRK-P drive power stages directly without external gate drivers?

Yes-its 8 CMOS-level PWM outputs deliver 13.9 mA sink / 9.8 mA source drive strength at 3.3 V, sufficient to directly drive logic-level MOSFET gates in half-bridge or BTL configurations. For high-side N-channel FETs requiring level-shifting, an external driver remains necessary.

How is the 115 dB dynamic range achieved with only 1.2 V analog supplies?

The AX5689GRK-P achieves 115 dB DR through proprietary low-noise analog front-end design, including correlated double sampling in its ADCs, optimized bias networks, and strict separation of analog/digital grounds (VSSA1/VSSA2). Measured at 20 Hz–20 kHz with A-weighting and −60 dB input, it exceeds typical 1.2 V supply limitations.

Does the AX5689GRK-P support I²S format with left-justified or right-justified data alignment?

No-it supports only I²S and TDM modes per the datasheet; left/right-justified formats are not implemented. TDM mode accommodates up to 16 downstream and 8 upstream slots per frame, with programmable slot width (16–32 bits) and frame sync polarity, providing equivalent flexibility for multi-channel audio transport.

What is the function of the INRP/INRN pins?

INRP and INRN are dedicated differential inputs for a reference ADC used to monitor internal reference voltage stability or external calibration sources. They are not part of the main 8-channel ADC array and serve diagnostic or precision biasing roles-not primary audio acquisition.

Is JTAG required for normal operation, or only for programming/debugging?

JTAG (TCK/TMS/TDI/TDO) is optional and used exclusively for factory programming, boundary-scan testing, and debug access. Normal runtime operation requires only the control interface (SPI/I²C), audio interfaces, and power supplies-JTAG pins may be left unconnected or tied to safe states (e.g., TMS/TDI pulled high via internal 54 kΩ pull-up).