Monolithic Power Systems Inc. AX5689GRK-Z

Overview

AX5689GRK-Z from Monolithic Power Systems is a 4-channel BTL digital Class-D amplifier controller IC with 8 low-latency ADCs (115 dB DR), 8 programmable digital loop-filter slices, and 8 CMOS-level PWM outputs configurable as 4 BTL channels. It enables feedback-based digital control loops across loudspeaker nodes for error suppression in the audio band (20 Hz–20 kHz), targeting high-fidelity active loudspeakers and TV soundbars.

For engineers reviewing the AX5689GRK-Z datasheet, AX5689GRK-Z pinout, AX5689GRK-Z application, or AX5689GRK-Z equivalent, key selection considerations include its 32–768 kHz I²S/TDM serial interface, 1.2 V analog/digital core supplies, 3.3 V I/O and PWM domains, SPI/I²C dual-control interface, and support for MIMO loop configurations with pop-free soft mute and dynamic ramp control.

Technical Context

The AX5689GRK-Z implements an 8-slice digital control architecture where each slice integrates feed-in filtering, butterfly mixing, programmable loop filtering, and PWM generation - enabling independent or interlinked channel control. Its 8 low-latency ADCs (typical latency: 1 MCLK cycle) operate at up to 60 kHz full-scale bandwidth and support differential input with 111 dB A-weighted SNR and –120 dB crosstalk.

Signal routing is fully configurable via output crossbar and slice-to-ADC interconnects, allowing custom topologies including analog input monitoring, power stage diagnostics, current/temperature sensing, and multi-output filter compensation. Loop gain remains high across 20 Hz–20 kHz, suppressing supply, power stage, and output filter errors digitally.

Key Specifications

Pinout & Package

The AX5689GRK-Z is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad (EPAD) for enhanced thermal dissipation. Pin assignment follows strict domain segregation: analog inputs (IN1P–IN8N, INRP/INRN), 8 PWM outputs (OUT1–OUT8), dual-domain power supplies, JTAG debug, and dual-control interfaces (SPI/I²C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital audio amplifier controller applications.

Compared with AX5689GRK-Z, AX5689CGRK-Z offers identical functionality with improved robustness and long-term availability, while TAS5825MRGZR trades loop fidelity and configurability for integration density and lower BOM count in mid-tier audio systems.

Availability

AX5689GRK-Z is available at Aetrix Electronics and suitable for TV soundbars, active loudspeakers, and high-resolution DAC subsystems requiring stable component supply during legacy design maintenance and EOL transition planning.

Supply support for AX5689GRK-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management and audio ICs, with design centers in the US, China, and Taiwan.

The AX5689 product line targets high-fidelity digital audio systems requiring ultra-low-latency feedback, multi-channel programmable control, and seamless integration with third-party power stages - emphasizing signal integrity over integration density.

FAQ

What does "END OF LIFE, REFER TO AX5689C" mean for AX5689GRK-Z?

AX5689GRK-Z has reached end-of-life status per MPS documentation, with last-time-buy dates published on the Monolithic Power Systems website. The AX5689CGRK-Z is its direct functional replacement, sharing identical pinout, register mapping, and software compatibility while incorporating minor silicon-level enhancements for reliability and ESD immunity.

Can AX5689GRK-Z drive Class-D power stages directly without external gate drivers?

No. AX5689GRK-Z provides CMOS-level PWM outputs (not high-current gate drivers) and requires external half-bridge or full-bridge gate drivers (e.g., MPS MPQ6535, TI UCC27531) to interface with discrete MOSFETs or integrated power stages. Its PSTART/PSTART_N and PFAULT_N signals coordinate timing and safety with those drivers.

How is feedback implemented across the loudspeaker nodes?

Feedback is implemented by connecting the loudspeaker's + and – terminals directly to two ADC inputs (e.g., IN1P/IN1N), enabling measurement of actual acoustic output after the LC output filter. The digital loop filter then computes correction terms applied to the PWM modulator - suppressing distortion and impedance-induced anomalies within 20 Hz–20 kHz.

What master clock (MCLK) jitter specifications must be met to achieve 111 dB SNR?

To sustain ≥111 dB A-weighted SNR, the MCLK must exhibit ≤100 ps RMS period jitter and <1.6 ns RMS baseband jitter (100 Hz–200 kHz). Exceeding these thresholds degrades ADC effective resolution and introduces correlated noise that cannot be removed by digital filtering.

Is the JTAG interface functional for production programming or only for development?

JTAG (TCK/TMS/TDI/TDO) supports boundary-scan testing, in-circuit debugging, and firmware loading during development. While functional in production, it is not intended for field firmware updates; SPI/I²C are the primary interfaces for runtime configuration and calibration in deployed systems.

Does AX5689GRK-Z support analog audio inputs in addition to digital?

Yes. Its 8 low-latency ADCs accept analog inputs (e.g., line-level or microphone signals) and can be routed into the digital signal processing chain alongside I²S/TDM streams. This enables hybrid architectures such as analog AUX input mixing, analog sensor monitoring, or analog reference calibration - all processed within the same loop-filter framework.

What thermal derating applies above 25°C ambient?

With θJA = 23°C/W, junction temperature rises ~23°C per watt of dissipated power. At 85°C ambient, maximum allowable power dissipation drops to ~2.6 W before exceeding the 125°C max junction limit. Layout with 6+ thermal vias under the EPAD and 2 oz copper is recommended to maintain θJC = 1.6°C/W performance.