Taiwan Semiconductor Corporation BAT54CD REG
- Part No.:
- BAT54CD REG
- Manufacturer:
- Taiwan Semiconductor Corporation
- Category:
- Diode Arrays
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
BAT54CD REG.pdf
- Description:
- DIODE ARR SCHOT 30V 200MA SOT363
- Quantity:
- Payment:

- Shipping:

Inventory:6,152
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Product details
Overview
BAT54CD REG from Taiwan Semiconductor is a dual-channel Schottky barrier diode in SOT-363 package, rated for 30 V repetitive peak reverse voltage, 200 mA forward current per diode, and 1.0 V forward voltage at 100 mA - used for high-speed voltage clamping and reverse polarity protection in compact DC power rails.
For engineers reviewing the BAT54CD REG datasheet, BAT54CD REG pinout, BAT54CD REG application, or BAT54CD REG equivalent, key selection criteria include dual-diode configuration, low VF at low IF, sub-5 ns reverse recovery time, and moisture sensitivity level 1 compliance for reflow compatibility.
Technical Context
The BAT54CD REG integrates two independent Schottky diodes in a single SOT-363 (SC-70-6) surface-mount package with common-cathode configuration. Its fast switching (trr ≤ 5 ns) and low forward voltage (VF ≤ 1.0 V @ 100 mA) enable efficient clamping in 3.3 V/5 V logic interfaces and USB power paths.
Each diode exhibits ≤ 2 μA reverse leakage at 25 V and 25°C, junction capacitance ≤ 10 pF at 1 V reverse bias, and operates across –65°C to +150°C junction temperature range - supporting industrial-grade thermal reliability without derating below 75°C ambient.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRRM | 30 V - supports clamping in 24 V nominal systems with 25% safety margin |
| IF per diode | 200 mA - sufficient for signal-level and low-power supply rail protection |
| VF @ 100 mA | 1.0 V max - minimizes conduction loss in reverse-polarity protection circuits |
| trr | 5 ns max - enables operation in >10 MHz switching applications without tail current |
| IR @ 25 V | 2 μA max - ensures low standby leakage in battery-backed circuits |
| CT @ 1 V | 10 pF max - preserves signal integrity in high-frequency data line clamping |
| TJ range | –65°C to +150°C - qualified for under-hood automotive and industrial control environments |
Pinout & Package
SOT-363 (SC-70-6) package: 6-pin, dual-diode common-cathode configuration with exposed thermal pad (not electrically connected); moisture sensitivity level 1 per J-STD-020, RoHS and halogen-free compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Anode of Diode A | Input node for first clamping path; connects to protected supply or signal line |
| 2 | Cathode (common) | Shared cathode node tied to reference rail (e.g., GND or VCC) |
| 3 | No connection | Internally unconnected; must be left floating or grounded per layout guidelines |
| 4 | No connection | Internally unconnected; must be left floating or grounded per layout guidelines |
| 5 | Anode of Diode B | Input node for second independent clamping path |
| 6 | Cathode (common) | Redundant cathode terminal - electrically identical to Pin 2 |
Key Features
| Feature | Design Value |
|---|---|
| Dual common-cathode Schottky diodes | Enables simultaneous protection of two independent lines sharing one return path |
| 1.0 V VF @ 100 mA | Reduces forward drop by ≥0.3 V vs. standard silicon diodes, lowering heat generation |
| 5 ns trr | Prevents reverse recovery overshoot in 10–50 MHz digital signal clamping |
| 2 μA IR @ 25 V | Minimizes quiescent current drain in always-on battery monitoring circuits |
| MSL Level 1 | Allows unlimited floor life and standard reflow without baking preconditioning |
Applications
| USB Port Protection | Logic-Level Signal Clamping |
|---|---|
Use Scenario: Protecting USB 2.0 D+ and D− lines from ESD and overvoltage transients during hot-plug events. IC Role / Device Role / Timing Role: Dual Schottky clamp limiting voltage excursions to < 3.6 V while preserving signal rise/fall times. Use Value: Prevents damage to USB transceivers without adding capacitive loading beyond 10 pF per line. | Use Scenario: Clamping 3.3 V CMOS I/O pins against negative-going glitches from adjacent switching nodes. IC Role / Device Role / Timing Role: Fast-turn-on Schottky diode shunting transient energy to ground before logic threshold violation. Use Value: Achieves sub-5 ns response with < 0.24 V forward drop at 0.1 mA, avoiding false triggering. |
| Reverse Polarity Input Protection | DC-DC Converter Feedback Clamp |
Use Scenario: Blocking reverse-connected input power in 5 V/12 V embedded power supplies using minimal footprint. IC Role / Device Role / Timing Role: Series-connected anode-to-input, cathode-to-regulator input; conducts only during correct polarity. Use Value: Delivers 200 mA continuous with 1.0 V drop - lower loss than P-MOSFET solutions in space-constrained designs. | Use Scenario: Limiting feedback node voltage swing in adjustable buck converters to prevent error amplifier saturation. IC Role / Device Role / Timing Role: Cathode tied to FB pin, anode to reference rail - clamps excursion above 0.6 V reference. Use Value: Maintains regulation accuracy by preventing >100 mV deviation from target output voltage during load transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Schottky diode applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Diodes Inc. SDMMA203L-7-F | Single-diode SOT-23; VF = 0.45 V @ 100 mA; trr = 4 ns; no common-cathode dual configuration | Requires two devices for dual-line protection; higher board area usage | Select when single-line clamping suffices and lowest VF is critical |
| Nexperia PMEG3002AEL,115 | Dual common-cathode SOT-363; VF = 0.49 V @ 100 mA; IR = 0.5 μA @ 25 V; trr = 4 ns | Lower leakage and faster recovery but higher VF tolerance band (±0.05 V) | Select when ultra-low IR dominates design priority over forward drop consistency |
Compared with BAT54CD REG, SDMMA203L-7-F requires duplication for dual-line use and lacks integrated common-cathode topology, while PMEG3002AEL,115 offers tighter leakage control but trades off forward voltage stability - BAT54CD REG balances speed, drop, and integration for cost-sensitive dual-rail protection.
Availability
BAT54CD REG is available at Aetrix Electronics and suitable for USB port protection, logic-level signal clamping, and reverse polarity input protection requiring stable component supply across industrial and consumer electronics production cycles.
Supply support for BAT54CD REG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Taiwan Semiconductor Corporation (TSC) is a vertically integrated analog and discrete semiconductor manufacturer headquartered in Hsinchu, Taiwan, serving global industrial, computing, and communications markets since 1979.
The BAT54 series targets high-reliability, surface-mount Schottky protection solutions for space-constrained DC power and signal integrity applications - emphasizing MSL-1 process control, low-VF consistency, and thermal robustness.
FAQ
What is the pin configuration of BAT54CD REG?
The BAT54CD REG uses a SOT-363 package with six terminals: Pins 1 and 5 are anodes of two independent Schottky diodes; Pins 2 and 6 are bonded together internally as the common cathode; Pins 3 and 4 are not connected. This configuration enables dual-line clamping with shared return path routing.
Does BAT54CD REG support reflow soldering without baking?
Yes, BAT54CD REG is rated MSL Level 1 per J-STD-020, meaning it has unlimited floor life and may be subjected to standard lead-free reflow profiles without prior baking - ideal for high-throughput SMT assembly lines handling mixed-component boards.
What is the maximum reverse leakage current for BAT54CD REG?
The BAT54CD REG specifies a maximum reverse leakage current of 2 μA per diode at VR = 25 V and TJ = 25°C. At elevated temperatures (e.g., 125°C), leakage increases predictably per the device's exponential IR–TJ relationship shown in Figure 2 of the datasheet.
Can BAT54CD REG replace BAT54AD REG in a design?
No - BAT54CD REG and BAT54AD REG share the same SOT-363 package and electrical ratings but differ in internal configuration: BAT54CD REG is common-cathode, while BAT54AD REG is common-anode. Swapping them without circuit revision will invert clamping polarity and cause functional failure.
Is BAT54CD REG suitable for automotive applications?
BAT54CD REG is qualified for operation from –65°C to +150°C junction temperature and meets RoHS/halogen-free requirements, but Taiwan Semiconductor does not specify AEC-Q200 qualification for this part. It may be used in non-safety-critical automotive subsystems pending customer qualification per application-specific stress testing.
BAT54CD REG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Taiwan Semiconductor Corporation
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Diode Configuration:
- 2 Pair Common Cathode
- Technology:
- Schottky
- Voltage - DC Reverse (Vr) (Max):
- 30 V
- Current - Average Rectified (Io) (per Diode):
- 200mA (DC)
- Voltage - Forward (Vf) (Max) @ If:
- 1 V @ 100 mA
- Speed:
- Small Signal =< 200mA (Io), Any Speed
- Reverse Recovery Time (trr):
- 5 ns
- Current - Reverse Leakage @ Vr:
- 2 µA @ 25 V
- Operating Temperature - Junction:
- -65°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-363
BAT54CD REG FAQ
1.How can I place an order for BAT54CD REG through Aetrix?
Please submit a Request for Quotation (RFQ) for BAT54CD REG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for BAT54CD REG reliable?
The price and inventory of BAT54CD REG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for BAT54CD REG is usually 5 days.
3.What payment methods are accepted for BAT54CD REG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for BAT54CD REG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for BAT54CD REG?
BAT54CD REG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your BAT54CD REG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for BAT54CD REG?
For technical support, including BAT54CD REG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your BAT54CD REG requirements.
6.How does Aetrix verify that BAT54CD REG is sourced from the original manufacturer or authorized distributors?
All BAT54CD REG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that BAT54CD REG meets industry standards.
7.What is the process for return or replacement of BAT54CD REG?
All BAT54CD REG units undergo pre-shipment inspection (PSI). If there is an issue with BAT54CD REG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The BAT54CD REG part is unused and in its original packaging.
Return procedure for BAT54CD REG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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