Nexperia USA Inc. BC846BPN/DG/B3X

Overview

BC846BPN/DG/B3X from Nexperia is a dual NPN/PNP general-purpose transistor pair in a single SOT363-3 (TSSOP6) package, rated for 65 V V_CEO, 100 mA I_C, and featuring matched h_FE (200–450 for NPN; 200–450 for PNP at 2 mA), low V_CE(sat) (200 mV typ. @ 100 mA), and 1.9–2.3 pF collector capacitance - used for complementary switching and amplification in compact DC-DC bias networks and level-shifting interfaces.

For engineers reviewing the BC846BPN datasheet, BC846BPN pinout, BC846BPN application, or BC846BPN equivalent, this device supports dual-polarity signal conditioning in space-constrained analog front-ends, discrete logic inverters, and current-mirror reference circuits where thermal coupling and gain matching between complementary transistors are critical.

Technical Context

This dual transistor integrates electrically isolated NPN (TR1) and PNP (TR2) die in one thermally coupled SOT363-3 package, enabling complementary operation without mutual interference. Each transistor supports independent biasing with open-base V_CEO = 65 V and V_CBO = ±80 V limits.

It delivers tightly matched DC current gain (h_FE) across both polarities at 2 mA collector current, with typical f_T ≥ 100 MHz for both devices and low noise figure (≤3.1 dB at 1 kHz), making it suitable for low-noise preamplifier stages and high-fidelity switching control paths.

Key Specifications

Pinout & Package

SOT363-3 (TSSOP6) plastic surface-mount package with 0.65 mm lead pitch, 2.2 mm × 1.35 mm body, and exposed pad-free construction - optimized for automated reflow assembly and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual complementary transistor applications.

Compared with BC846BPN, BC847BPN offers higher gain at the cost of reduced high-frequency response, while MBT3904/3906 lacks monolithic integration - making BC846BPN uniquely suited for space- and stability-critical dual-transistor functions where die-level matching and thermal coupling are essential.

Availability

BC846BPN/DG/B3X is available at Aetrix Electronics and suitable for DC-DC converter bias networks, complementary logic inverters, current mirror references, and audio preamp input stages requiring stable component supply and consistent parametric matching across production batches.

Supply support for BC846BPN/DG/B3X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified and industrial-grade components.

The BC846BPN belongs to Nexperia's general-purpose bipolar transistor family, engineered specifically for space-constrained, dual-polarity applications demanding matched gain, low saturation voltage, and minimal mutual interference in a single compact package.

FAQ

What is the maximum junction temperature for BC846BPN/DG/B3X?

The absolute maximum junction temperature (T_j) is 150 °C, as defined in the Absolute Maximum Ratings table. Operation above this limit risks permanent degradation of h_FE and increased leakage. Derating begins at 25 °C ambient, with total device power dissipation dropping to 0 mW at 125 °C ambient per the published derating curve.

Can BC846BPN/DG/B3X be used in automotive applications?

No - BC846BPN/DG/B3X is not automotive-qualified. The datasheet explicitly states "Non-automotive qualified products" and confirms it has not been tested to AEC-Q101 or automotive reliability standards. It lacks extended temperature validation, qualification test reports, and PPAP documentation required for automotive use.

Is the h_FE matching between TR1 and TR2 guaranteed across production lots?

Yes - the datasheet specifies identical h_FE min/typ/max ranges (200–450) for both TR1 (NPN) and TR2 (PNP) under identical test conditions (V_CE = ±5 V, I_C = ±2 mA, T_amb = 25 °C), and highlights "closely matched current gain" as a key benefit. This matching is achieved via monolithic fabrication and process-controlled doping.

What is the recommended solder profile for SOT363-3 package mounting?

Nexperia specifies reflow soldering per J-STD-020, with peak temperature ≤260 °C, time above liquidus 40–80 s, and ramp rate ≤3 °C/s. The footprint uses 0.5 mm × 0.6 mm solder pads (4 per side), and wave soldering requires 5.3 mm × 1.3 mm carrier dimension alignment per Figure 21 in the datasheet.