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Infineon Technologies CY7C68013A-128AXI
- Part No.:
- CY7C68013A-128AXI
- Manufacturer:
- Infineon Technologies
- Category:
- Application Specific Microcontrollers
- Package:
- 128-LQFP
- Datasheet:
-
CY7C68013A-128AXI.pdf
- Description:
- IC MCU USB PERIPH HI SPD 128LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,101
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Product details
Overview
CY7C68013A-128AXI from Infineon Technologies (formerly Cypress Semiconductor) is a USB 2.0 high-speed peripheral controller integrating an enhanced 8051 microprocessor, USB 2.0 transceiver, serial interface engine (SIE), and general programmable interface (GPIF) in a single 128-pin TQFP package. It supports 48-MHz CPU operation, 16 KB on-chip RAM, four configurable BULK/INTERRUPT/ISOCHRONOUS endpoints with double/triple/quad buffering, and 8-/16-bit external data interface - enabling direct glueless interfacing to ATA, EPP, PCMCIA, or FPGA peripherals in bus-powered USB devices.
For engineers reviewing the CY7C68013A-128AXI datasheet, CY7C68013A-128AXI pinout, CY7C68013A-128AXI application, or CY7C68013A-128AXI equivalent, key selection criteria include suspend current (300 µA typ), GPIF waveform programmability, USB 2.0 Hi-Speed certification (TID #40460272), I²C controller support (100/400 kHz), and fit/form/function compatibility with CY7C68013 FX2.
Technical Context
The device implements a hardware-accelerated USB 2.0 protocol stack via its Smart SIE, offloading enumeration, token handling, and error recovery from the 8051 core. Its 48-MHz 8051 executes firmware from internal RAM (downloaded via USB or loaded from EEPROM) and supports two USARTs, three timers, and an expanded interrupt system with vectored USB and GPIF/FIFO interrupts.
GPIF operates as a fully autonomous state-machine-based interface controller, accepting programmable waveform descriptors to generate precise timing for up to six CTL outputs and six RDY inputs. It supports master/slave FIFO operation, asynchronous/strobed 8-/16-bit bus protocols, and automatic width conversion - eliminating external glue logic when interfacing with ASICs, DSPs, or memory controllers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| USB Speed | Hi-Speed (480 Mbps) and Full-Speed (12 Mbps); certified per USB-IF TID #40460272 - ensures interoperability with host controllers without custom driver development. |
| CPU Core | Enhanced 8051 running at 12/24/48 MHz (4 clocks/instruction); enables real-time USB endpoint management while executing application firmware in same core. |
| On-chip RAM | 16 KB code/data RAM; eliminates need for external program memory in most firmware deployments - reduces BOM cost and PCB footprint. |
| Endpoints | Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints + one additional 64-byte BULK/INTERRUPT endpoint; supports concurrent high-bandwidth streaming and low-latency control transfers. |
| GPIF Interface | Programmable 8-/16-bit parallel interface with up to 6 CTL outputs and 6 RDY inputs; enables direct connection to ATA, SRAM, FPGA, or DSP without external logic. |
| I²C Controller | Integrated master-only I²C interface operating at ~85 kHz (100 kHz setting) or ~300 kHz (400 kHz setting); used for EEPROM configuration or sensor communication. |
| Suspend Current | 300 µA (typ) at 3.3 V; meets USB bus-powered device power budget constraints without requiring external power management circuitry. |
Pinout & Package
Package: 128-pin Thin Quad Flat Package (TQFP), 14 mm × 14 mm, 0.4 mm pitch, RoHS-compliant, industrial temperature grade (–40°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D+ / D− | USB 2.0 differential data pair | Direct connection to USB connector; integrated transceiver eliminates external PHY - reduces component count and layout complexity. |
| CLKOUT | 8051 clock output | Provides 12/24/48 MHz clock signal with 50% duty cycle; can be inverted or tri-stated for synchronization with external logic or test equipment. |
| INT1 / INT2 | Vectored interrupt outputs | Asserted on USB/GPIF/FIFO events; enables low-latency, priority-based firmware response without polling overhead. |
| SLCS# / SLRD# / SLWR# | Slave FIFO control signals | Enable direct 8-/16-bit synchronous/asynchronous data transfer between FX2LP and external peripherals - no CPU intervention required. |
| CTL[5:0] / RDY[5:0] | GPIF control and ready inputs | Support user-defined handshake protocols; allow precise timing alignment with external devices such as FPGAs or memory controllers. |
| I2C_SDA / I2C_SCL | I²C bidirectional data/clock | Connect to EEPROM or sensors; supports standard-mode (~85 kHz) and fast-mode (~300 kHz) operation per internal timing calibration. |
Key Features
| Feature | Design Value |
|---|---|
| Smart Serial Interface Engine (SIE) | Hardware-implemented USB protocol handling - reduces 8051 firmware burden by managing token parsing, CRC generation, and packet sequencing autonomously. |
| General Programmable Interface (GPIF) | State-machine-driven parallel interface with graphical waveform descriptor programming - enables custom timing for legacy or proprietary bus protocols without FPGA or CPLD. |
| Endpoint Buffering Options | Double/triple/quad buffering per endpoint - prevents data loss during high-throughput isochronous transfers (e.g., video streaming) and simplifies firmware buffer management. |
| USB Boot Flexibility | Firmware load from USB (default), internal EEPROM, or external memory - supports field-upgradable designs and secure boot via encrypted EEPROM images. |
| Low-Power Operation | ICC ≤ 85 mA in all active modes; 300 µA suspend current - enables compliance with USB bus-powered Class C device limits without external LDO or charge pump. |
Applications
| Portable Video Recorder | DSL Modem Interface |
|---|---|
Use Scenario: Capturing MPEG-2/4 video streams from CMOS image sensors and transferring over USB 2.0 to host PC for storage or encoding. IC Role / Device Role / Timing Role: USB peripheral controller acting as high-bandwidth data pump with isochronous endpoint support and GPIF-timed sensor interface. Use Value: Achieves sustained >40 MB/s throughput using quad-buffered ISOCHRONOUS endpoints and GPIF-controlled sensor readout - avoids frame drops during recording. |
Use Scenario: Bridging ATM/DSL physical layer ICs to host processor via USB, handling AAL5 SAR, OAM cell processing, and statistics reporting. IC Role / Device Role / Timing Role: USB-to-parallel bridge with slave FIFO mode and programmable strobe timing for synchronous DSL PHY handshaking. Use Value: Eliminates external FIFO and address decoder; uses SLRD#/SLWR# and RDY inputs to match variable PHY latency - reduces bill-of-materials by 7 components. |
| Memory Card Reader | Legacy Device Converter |
Use Scenario: Reading SD/MMC/CF cards and presenting them as USB mass storage class devices to host systems. IC Role / Device Role / Timing Role: USB MSC class controller with ATA command translation via GPIF-driven parallel interface to card controller. Use Value: Supports UDMA Mode 2 (16.6 MB/s) using 16-bit GPIF burst transfers - matches SDHC card performance without external DMA controller. |
Use Scenario: Converting parallel printer (IEEE-1284), parallel port scanner, or ISA-bus industrial I/O to USB plug-and-play interface. IC Role / Device Role / Timing Role: Protocol translator implementing EPP or bi-directional strobed handshaking via GPIF waveform descriptors. Use Value: Replaces legacy motherboard headers with USB-C connectivity while preserving existing peripheral firmware - extends product lifecycle without hardware redesign. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB peripheral controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY7C68014A-128AXI | Identical pinout and firmware compatibility; lower suspend current (100 µA typ) due to optimized power gating - requires identical 3.3-V supply but tighter decoupling for noise-sensitive battery operation. | Targeted for battery-powered devices (e.g., handheld scanners); lacks industrial temp rating in VFBGA variant but retains it in 128-pin TQFP. | Select when <300 µA suspend current is mandatory and battery life is primary constraint; verify thermal derating in enclosed enclosures. |
| CY7C68015A-56PVXI | 56-pin QFN package (26 GPIOs vs. 40), same core and USB functionality; no 128-pin option; suspend current 300 µA (same as CY7C68013A) but higher max junction temp (105°C). | Used where board space is critical (5 mm × 5 mm footprint); supports same GPIF and endpoint features but fewer GPIOs limits multi-peripheral expansion. | Select for compact, cost-sensitive designs needing <100 mm² PCB area; confirm all required signals fit within 26 GPIOs before layout. |
Compared with CY7C68014A-128AXI, this part trades 200 µA higher suspend current for broader industrial temperature support; compared with CY7C68015A-56PVXI, it provides 14 extra GPIOs and larger RAM buffer headroom at the cost of 3× PCB area - making it optimal for feature-rich, thermally stable embedded USB hosts.
Availability
CY7C68013A-128AXI is available at Aetrix Electronics and suitable for portable video recorders, DSL modem interfaces, and memory card readers requiring stable component supply across industrial temperature ranges and long-term production cycles.
Supply support for CY7C68013A-128AXI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies acquired Cypress Semiconductor in 2020 and maintains full product continuity, technical documentation, and manufacturing for the EZ-USB FX2LP family - ensuring long-term support for industrial and automotive-grade applications.
This device belongs to the EZ-USB FX2LP USB microcontroller product line, designed specifically to accelerate time-to-market for USB 2.0 peripheral devices by integrating protocol handling, microcontroller, and flexible interface logic in a single low-power chip.
FAQ
Is CY7C68013A-128AXI pin-compatible with the original CY7C68013 FX2?
Yes, it is fully pin-, object-code-, and function-compatible with CY7C68013 FX2 in the 128-pin TQFP package. All signal names, power pins, and GPIO mappings match exactly, allowing drop-in replacement without PCB revision. Firmware compiled for FX2 runs unmodified on FX2LP, though new features like enhanced GPIF descriptors require updated SDK usage.
What are the supported USB boot methods for CY7C68013A-128AXI?
The device supports three boot sources: (1) USB download of firmware into internal RAM (default on power-up), (2) loading from external I²C EEPROM (address 0x50), or (3) execution from external memory via 8-/16-bit data bus. Boot mode is selected by strapping GPIO pins (e.g., PIN12/PIN13) at reset - no external ROM programmer required.
Can the GPIF interface operate synchronously and asynchronously?
Yes, GPIF supports both synchronous and asynchronous timing modes. In synchronous mode, it uses CLKOUT or external clock with defined setup/hold times; in asynchronous mode, it relies on RDY inputs and CTL outputs for handshaking. The CY7C68013A-128AXI datasheet specifies timing parameters for both - e.g., 12 ns minimum RDY assertion before CTL edge in async mode.
Does CY7C68013A-128AXI support USB device class drivers without custom INF files?
It supports standard USB classes including CDC ACM (virtual COM port), HID, and Mass Storage Device (MSC) out-of-the-box using Windows built-in drivers. For custom classes, vendor-specific INF files are required, but the device's USB descriptor flexibility allows seamless integration with Linux udev rules or macOS IOUSBFamily extensions without kernel modifications.
CY7C68013A-128AXI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- EZ-USB FX2LP™
- Package/Case:
- 128-LQFP
- Packaging:
- Bulk
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Applications:
- USB Microcontroller
- Core Processor:
- 8051
- Program Memory Type:
- ROMless
- Controller Series:
- CY7C680xx
- RAM Size:
- 16K x 8
- Interface:
- I2C, USB, USART
- Number of I/O:
- 40
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 128-TQFP (14x20)
CY7C68013A-128AXI FAQ
1.How can I place an order for CY7C68013A-128AXI through Aetrix?
Please submit a Request for Quotation (RFQ) for CY7C68013A-128AXI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY7C68013A-128AXI reliable?
The price and inventory of CY7C68013A-128AXI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY7C68013A-128AXI is usually 5 days.
3.What payment methods are accepted for CY7C68013A-128AXI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY7C68013A-128AXI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY7C68013A-128AXI?
CY7C68013A-128AXI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY7C68013A-128AXI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY7C68013A-128AXI?
For technical support, including CY7C68013A-128AXI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY7C68013A-128AXI requirements.
6.How does Aetrix verify that CY7C68013A-128AXI is sourced from the original manufacturer or authorized distributors?
All CY7C68013A-128AXI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY7C68013A-128AXI meets industry standards.
7.What is the process for return or replacement of CY7C68013A-128AXI?
All CY7C68013A-128AXI units undergo pre-shipment inspection (PSI). If there is an issue with CY7C68013A-128AXI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY7C68013A-128AXI part is unused and in its original packaging.
Return procedure for CY7C68013A-128AXI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY7C68013A-128AXI Tags
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CYPD3175-24LQXQ
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