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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Management - Specialized

Renesas DA9063L-XXHO2-AT

Name: DA9063L-XXHO2-AT
Brand: Renesas
SKU: DA9063L-XXHO2-AT
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: DA9063L-XXHO2-AT

Manufacturer:: Renesas

Category:: Power Management - Specialized

Package:: 100-TFBGA

Datasheet:: DA9063L-XXHO2-AT.pdf

Description:: ONCE OTP IS FINALIZED, PART BECO

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Product details

Overview

DA9063L-XXHO2-AT from Renesas Electronics is a high-current system PMIC designed for dual- and quad-core application processors in mobile and automotive systems, delivering up to 5 A core supply, integrating six DC-DC buck converters (0.3–3.34 V, up to 2.5 A each), five SmartMirror™ LDOs (up to 300 mA), a 10-bit 9-channel ADC, RGB-LED/PWM vibration motor drivers, and programmable power sequencing. It supports DDR VTT termination, DVC, and operates from 2.8–5.5 V input.

For engineers reviewing the DA9063L-XXHO2-AT datasheet, DA9063L-XXHO2-AT pinout, DA9063L-XXHO2-AT application, or DA9063L-XXHO2-AT equivalent, key selection considerations include its AEC-Q100 Grade 2 qualification, dual-phase BUCKCORE capability (up to 5 A), 3 MHz switching frequency enabling 1 µH inductors, OTP-based autonomous start-up, and 16 GPIOs with wakeup and peripheral control functions.

Technical Context

The DA9063L-XXHO2-AT implements a hardware-programmable power manager with OTP-configurable start-up sequencing, supporting autonomous NO-POWER mode boot and software-controlled transitions across six operating modes (<20 µA quiescent in POWERDOWN/DELIVERY/RESET/NO-POWER). Its buck converters use integrated power switches, no external Schottky diodes, and support merged, dual-phase, and DDR termination modes.

It integrates an I²C HS 2-wire interface (up to 3.4 Mbps), a 10-bit ADC with auto-scheduler and programmable thresholds, three RGB-LED driver pins with autonomous PWM flashing, and LDO8 configurable as a 6-bit PWM vibration motor driver with battery voltage correction - all coordinated via register-mapped control across four register pages.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	2.8 V to 5.5 V - supports single-cell Li-ion, USB PD, and automotive 12 V (via pre-regulator) inputs.
Buck Converters	6 × synchronous buck regulators, 0.3–3.34 V output, up to 2.5 A each; dual-phase BUCKCORE1/2 delivers up to 5 A total.
Switching Frequency	3 MHz - enables use of compact 1 µH inductors and reduces output capacitor requirements.
LDO Regulators	5 × SmartMirror™ LDOs, 0.9–3.6 V, up to 300 mA; includes low-noise LDO3 and DVS-capable LDO7.
ADC Resolution & Channels	10-bit manual / 8-bit auto mode; 9 channels including temp, VDD monitoring, 3 GP inputs, current source for resistive sensing.
GPIO Count & Flexibility	16 programmable GPIOs - support keypad supervision, wakeup, regulator enable, PWM outputs, and interrupt generation.
Package Options	100-ball VFBGA (8.0 × 8.0 × 1.0 mm, 0.8 mm pitch, 0.30 mm balls) - matches DA9063L-XXHO2-AT marking.

Pinout & Package

DA9063L-XXHO2-AT uses a 100-ball Very Fine Pitch Ball Grid Array (VFBGA) package: 8.0 mm × 8.0 mm × 1.0 mm body, 0.8 mm ball pitch, 0.30 mm solder balls. Thermal pad exposed on underside for enhanced heat dissipation.

Pin	Circuit Role	Design Meaning
nIRQ	Digital Output Interrupt	Active-low host interrupt signaling regulator faults, ADC alarms, or GPIO events - requires pull-up for proper logic level.
VBUCKCORE1 / VBUCKCORE2	Analog Input Sense	Feedback nodes for dual-phase BUCKCORE regulation - connect directly to output capacitor for accurate voltage monitoring.
SWBUCKCORE1_A / SWBUCKCORE1_B	Analog Output Switch Node	Half-current and full-current switching nodes for BUCKCORE1 - require low-ESR ceramic capacitors and tight layout to minimize EMI.
GP_FB1 / GP_FB2 / GP_FB3	Digital I/O / Analog Function	Multi-function pins: EXT_WAKEUP/READY status, PWR_OK indication, and nVIB_BRAKE control for LDO8 motor driver braking.
DATA / CLK	I²C Interface	High-speed 2-wire serial interface (up to 3.4 Mbps) - supports register read/write, DVC updates, and ADC configuration without host CPU intervention.
nONKEY	Digital Input Key Detect	Dedicated on/off key input with programmable long-press detection for controlled shutdown or reset - internal debouncing and timing logic.

Key Features

Feature	Design Value
Dual-phase BUCKCORE architecture	Enables 5 A core processor supply using two synchronized 2.5 A bucks - reduces thermal stress and improves transient response vs. single-phase designs.
OTP-based power sequencing engine	Hardware-autonomous start-up from NO-POWER mode without host firmware - eliminates boot dependency and ensures deterministic power rail ordering.
SmartMirror™ LDOs with remote cap support	Allow placement of output capacitors away from IC for board space optimization - maintains stability even with >10 cm trace lengths.
10-bit GPADC with auto-scheduler	Performs continuous temperature, voltage, and resistor measurements without CPU polling - triggers IRQ on threshold violation for real-time fault response.
PWM vibration motor driver (LDO8)	6-bit resolution PWM output with automatic battery voltage compensation - maintains consistent motor intensity across 3.0–4.4 V Li-ion discharge range.
AEC-Q100 Grade 2 qualification	Validated for operation from −40 °C to +105 °C ambient - meets automotive infotainment and ADAS subsystem reliability requirements.

Applications

Automotive Infotainment	Mobile Application Processor Power
Use Scenario: Power management for head-unit SoCs (e.g., i.MX8, Snapdragon Automotive) requiring multiple regulated rails, DDR termination, and thermal monitoring. IC Role / Device Role / Timing Role: System PMIC providing sequenced core, memory, I/O, and peripheral supplies with watchdog supervision and fault reporting. Use Value: Enables AEC-Q100-compliant design with <20 µA quiescent current in DELIVERY mode - extends battery life during vehicle sleep states.	Use Scenario: Power delivery for dual-/quad-core application processors in tablets and ultra-books demanding dynamic voltage scaling and low-noise analog supplies. IC Role / Device Role / Timing Role: Centralized power controller managing BUCKCORE DVC, LDO3 low-noise bias for audio codecs, and RGB-LED feedback. Use Value: 3 MHz buck switching minimizes inductor size and EMI - critical for thin form factors where board area and RF sensitivity are constrained.
FPGA Power Management	Industrial IoT Gateway
Use Scenario: Supplying configurable core, auxiliary, and I/O voltages for Xilinx Zynq or Intel Cyclone SoC-FPGAs in edge compute devices. IC Role / Device Role / Timing Role: Programmable regulator controller delivering precise 0.85 V core, 1.2 V memory, and 3.3 V I/O rails with independent enable sequencing. Use Value: Merged-mode BUCKMEM/BUCKIO supports 3 A at 1.2 V - satisfies FPGA memory rail peak current without external controllers.	Use Scenario: Power solution for ARM-based gateways with cellular/Wi-Fi modules, sensors, and display interfaces operating in harsh industrial environments. IC Role / Device Role / Timing Role: Robust system PMIC providing fault-tolerant power, junction temperature monitoring, and GPIO-controlled peripheral enable/disable. Use Value: 16 GPIOs support wake-on-LAN, modem reset, sensor bias control, and LED status - consolidates discrete logic and reduces BOM count.

Automotive Infotainment

Mobile Application Processor Power

Use Scenario: Power management for head-unit SoCs (e.g., i.MX8, Snapdragon Automotive) requiring multiple regulated rails, DDR termination, and thermal monitoring.

IC Role / Device Role / Timing Role: System PMIC providing sequenced core, memory, I/O, and peripheral supplies with watchdog supervision and fault reporting.

Use Value: Enables AEC-Q100-compliant design with <20 µA quiescent current in DELIVERY mode - extends battery life during vehicle sleep states.

Use Scenario: Power delivery for dual-/quad-core application processors in tablets and ultra-books demanding dynamic voltage scaling and low-noise analog supplies.

IC Role / Device Role / Timing Role: Centralized power controller managing BUCKCORE DVC, LDO3 low-noise bias for audio codecs, and RGB-LED feedback.

Use Value: 3 MHz buck switching minimizes inductor size and EMI - critical for thin form factors where board area and RF sensitivity are constrained.

FPGA Power Management

Industrial IoT Gateway

Use Scenario: Supplying configurable core, auxiliary, and I/O voltages for Xilinx Zynq or Intel Cyclone SoC-FPGAs in edge compute devices.

IC Role / Device Role / Timing Role: Programmable regulator controller delivering precise 0.85 V core, 1.2 V memory, and 3.3 V I/O rails with independent enable sequencing.

Use Value: Merged-mode BUCKMEM/BUCKIO supports 3 A at 1.2 V - satisfies FPGA memory rail peak current without external controllers.

Use Scenario: Power solution for ARM-based gateways with cellular/Wi-Fi modules, sensors, and display interfaces operating in harsh industrial environments.

IC Role / Device Role / Timing Role: Robust system PMIC providing fault-tolerant power, junction temperature monitoring, and GPIO-controlled peripheral enable/disable.

Use Value: 16 GPIOs support wake-on-LAN, modem reset, sensor bias control, and LED status - consolidates discrete logic and reduces BOM count.

Equivalent & Alternatives

The following parts are listed as comparable options for similar system PMIC applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
DA9062-XXHA2-AT	5-buck, 4-LDO architecture; no DDR VTT mode; lower max buck current (2 A); lacks vibration motor driver and GP_FB3 functionality.	Suitable for simpler mobile platforms without DDR memory or haptic feedback requirements.	Select when cost reduction is prioritized over DDR termination, motor drive, and extended GPIO features.
TPS6591221ZWSR	Texas Instruments part with 6 bucks, 10 LDOs, but no OTP sequencer - relies on host processor for startup coordination; different I²C register map and GPIO behavior.	Better suited for designs with robust host firmware control and less stringent autonomous boot requirements.	Choose if existing TI ecosystem integration and higher LDO count outweigh need for hardware-sequenced cold boot.

Compared with DA9063L-XXHO2-AT, DA9062-XXHA2-AT reduces feature set and current capability for cost-sensitive entry-tier designs, while TPS6591221ZWSR trades autonomous OTP sequencing for greater LDO flexibility and TI toolchain support - neither offers pin compatibility or identical register-level control.

Availability

DA9063L-XXHO2-AT is available at Aetrix Electronics and suitable for automotive infotainment, mobile application processor power, and FPGA supply applications requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle assurance.

Supply support for DA9063L-XXHO2-AT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power management, and connectivity solutions for automotive, industrial, and IoT markets.

The DA9063L-XXHO2-AT belongs to Renesas' System PMIC product line, engineered specifically for high-efficiency, multi-rail power delivery in resource-constrained mobile and automotive platforms with stringent thermal and sequencing demands.

FAQ

What is the maximum supported core processor supply current for DA9063L-XXHO2-AT?

The DA9063L-XXHO2-AT supports up to 5 A core processor supply by configuring BUCKCORE1 and BUCKCORE2 in dual-phase mode - each delivers up to 2.5 A, with synchronized switching and shared feedback. This capability is confirmed in the datasheet's "Key Features" and "Regulator Overview" sections, and applies specifically to the DA9063L-XXHO2-AT variant with its VFBGA package and full-feature configuration.

Does DA9063L-XXHO2-AT support DDR memory bus termination?

Yes, DA9063L-XXHO2-AT supports DDR VTT termination through BUCKPRO configured in DDR memory bus termination mode - generating a precise 50 % of VDDQ reference voltage (VTTR) with fast transient response. This function is explicitly documented in Section 6.10.2 ("BUCKPRO in DDR Memory Bus Termination Mode") and Table 3 of the datasheet, and is enabled via OTP or register programming.

What package type does DA9063L-XXHO2-AT use, and is it RoHS compliant?

DA9063L-XXHO2-AT uses a 100-ball Very Fine Pitch Ball Grid Array (VFBGA) package measuring 8.0 mm × 8.0 mm × 1.0 mm with 0.8 mm pitch and 0.30 mm solder balls. It is RoHS compliant and moisture sensitivity level (MSL) 3, as specified in Section 9 of the datasheet - matching the "XXHO2" suffix designation in the ordering information.

Can DA9063L-XXHO2-AT operate autonomously without host processor intervention?

Yes, DA9063L-XXHO2-AT features an OTP-based start-up sequencing engine that enables fully autonomous hardware boot from NO-POWER mode - powering rails in user-defined order without host firmware. This is detailed in Sections 6.3 and 6.5 of the datasheet and is a defining capability of the DA9063L-XXHO2-AT, distinguishing it from software-dependent PMICs.

What is the resolution and operating mode of the integrated ADC in DA9063L-XXHO2-AT?

The DA9063L-XXHO2-AT integrates a 9-channel ADC with 10-bit resolution in manual conversion mode and 8-bit resolution in AUTO mode. It supports programmable thresholds, automatic scheduling, and a dedicated current source for resistive sensing - all confirmed in Sections 5.9 and 6.11 of the datasheet and applicable to the DA9063L-XXHO2-AT without qualification.

DA9063L-XXHO2-AT Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: -

Package/Case:: 100-TFBGA

Packaging:: Tape & Reel (TR)

Product Status:: Active

Applications:: Processor

Current - Supply:: 11mA

Voltage - Supply:: 2.8V ~ 5.5V

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 100-TFBGA (8x8)

DA9063L-XXHO2-AT FAQ

1.How can I place an order for DA9063L-XXHO2-AT through Aetrix?

Please submit a Request for Quotation (RFQ) for DA9063L-XXHO2-AT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DA9063L-XXHO2-AT reliable?

The price and inventory of DA9063L-XXHO2-AT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DA9063L-XXHO2-AT is usually 5 days.

3.What payment methods are accepted for DA9063L-XXHO2-AT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DA9063L-XXHO2-AT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DA9063L-XXHO2-AT?

DA9063L-XXHO2-AT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DA9063L-XXHO2-AT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DA9063L-XXHO2-AT?

For technical support, including DA9063L-XXHO2-AT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DA9063L-XXHO2-AT requirements.

6.How does Aetrix verify that DA9063L-XXHO2-AT is sourced from the original manufacturer or authorized distributors?

All DA9063L-XXHO2-AT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DA9063L-XXHO2-AT meets industry standards.

7.What is the process for return or replacement of DA9063L-XXHO2-AT?

All DA9063L-XXHO2-AT units undergo pre-shipment inspection (PSI). If there is an issue with DA9063L-XXHO2-AT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DA9063L-XXHO2-AT part is unused and in its original packaging.

Return procedure for DA9063L-XXHO2-AT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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