Diodes Incorporated DGD1003FTA-13

Overview

DGD1003FTA-13 from Diodes Incorporated is a high-voltage half-bridge gate driver IC designed to control two N-channel MOSFETs or IGBTs in switching power stages. It features 150V high-side bootstrap operation, 290mA source / 600mA sink output current, and a fixed 420ns internal deadtime. It operates across –40°C to +125°C and interfaces with 3.3V–5V logic in DC-DC converters and motor controls.

For engineers reviewing the DGD1003FTA-13 datasheet, DGD1003FTA-13 pinout, DGD1003FTA-13 application, or DGD1003FTA-13 equivalent, key selection criteria include high-side floating voltage capability (VS up to 150V), propagation delay matching (<60ns), TTL/CMOS-compatible inputs, undervoltage lockout thresholds (8.9V typ), and V-DFN3035-8 thermal performance (RθJA = 231°C/W).

Technical Context

The DGD1003FTA-13 integrates independent high-side and low-side drivers with matched propagation delays and built-in 420ns deadtime to prevent shoot-through in half-bridge topologies. Its bootstrap architecture supports VS up to 150V with dVS/dt tolerance of 50V/ns, enabling robust operation in fast-switching inverters and Class D amplifiers.

Logic inputs HIN and LIN* use Schmitt-triggered receivers compatible with 3.3V CMOS/TTL levels, while outputs HO and LO deliver asymmetric drive strength (290mA source / 600mA sink) optimized for gate charge/discharge asymmetry in power FETs. Undervoltage lockout acts separately on VCC (8.9V typ) and VB supply paths.

Key Specifications

Pinout & Package

Package: V-DFN3035-8 (3.5mm × 3.0mm × 0.8mm, 8-pin, exposed thermal pad, RoHS-compliant NiPdAu terminations).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with IRS2004SPBF and LM5109BMAX/NOPB, the DGD1003FTA-13 offers tighter propagation matching (<60ns), native 3.3V logic support, and integrated UVLO - making it optimal for space-constrained, cost-sensitive 100V-class DC-DC and motor control designs where timing consistency and simplified layout are critical.

Availability

DGD1003FTA-13 is available at Aetrix Electronics and suitable for DC-DC converters, motor controls, and AC-DC power supplies requiring stable component supply, extended temperature operation, and compact V-DFN3035-8 packaging.

Supply support for DGD1003FTA-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in power management, signal integrity, and connectivity solutions for industrial, computing, and consumer markets.

The DGD1003 belongs to Diodes' high-performance gate driver product line, engineered for efficiency-critical half-bridge topologies in power conversion and motor drive systems where timing accuracy, thermal robustness, and integration reduce system-level complexity.

FAQ

What is the maximum allowable dVS/dt for reliable high-side operation?

The DGD1003FTA-13 specifies a maximum dVS/dt of 50V/ns under recommended operating conditions. Exceeding this rate may cause false triggering or latch-up due to capacitive coupling into the level-shift circuitry. Layout best practices-such as minimizing VS loop area and using low-inductance bootstrap capacitors-are essential to maintain stability at high switching speeds.

Can LIN* be driven with active-high logic signals?

No-LIN* is an active-low input by design. Driving it with active-high logic will invert the intended low-side switching behavior. To interface with active-high controllers, an external inverter or logic inversion in firmware is required. The datasheet explicitly defines LIN* polarity and does not support reconfiguration.

Is the 420ns deadtime adjustable or fixed?

The 420ns deadtime is fixed and internally generated-no external components or pins configure it. This eliminates timing variability from component tolerances but means system-level deadtime tuning must occur upstream in the PWM controller. The value is guaranteed across temperature and supply voltage per DS41657 Rev. 2.

Does the V-DFN3035-8 package require solder paste stencil adjustments for thermal pad reflow?

Yes-the exposed thermal pad (pin 4 COM) requires a 70–80% solder paste coverage area with 4–6 evenly distributed window openings in the stencil. Insufficient paste causes voiding and thermal resistance increase; excessive paste risks bridging. Diodes' packaging guide recommends 0.12mm stencil thickness and Type 4 solder paste for optimal void reduction.