Diodes Incorporated DST847BPDP6-7

Overview

DST847BPDP6 from Diodes Incorporated is a complementary NPN/PNP small-signal transistor pair in a single SOT-963 package, rated for 45V V_CEO, ±100mA I_C, and 300mW P_D. It delivers matched gain (h_FE = 200–470), low V_CE(sat) (≤125mV NPN / ≤500mV PNP at rated current), and AEC-Q101 qualification for automotive signal switching and biasing circuits.

For engineers reviewing the DST847BPDP6 datasheet, DST847BPDP6 pinout, DST847BPDP6 application, or DST847BPDP6 equivalent, key selection criteria include complementary polarity matching, thermal derating above 25°C ambient, SOT-963 footprint constraints, and dual-transistor layout efficiency in space-constrained DC-DC feedback or LED driver bias networks.

Technical Context

This dual transistor integrates electrically isolated NPN (Q1) and PNP (Q2) die in one ultra-compact SOT-963 package. Each device supports independent operation with separate base, collector, and emitter terminals - no internal connection between Q1 and Q2. The NPN exhibits f_T = 100–175 MHz; the PNP achieves f_T = 100–340 MHz under symmetric test conditions (V_CE = ±5V, I_C = ±10mA).

Thermal design relies on R_θJA = 417°C/W (min pad layout, still air), with derated power dissipation down to 0W at T_A ≥ 125°C per Fig. 3. ESD robustness includes 4kV HBM and 200V MM ratings, meeting JEDEC JESD22-A114/A115 standards for board-level handling reliability.

Key Specifications

Pinout & Package

SOT-963 is a 6-pin, 1.0 × 1.0 mm surface-mount package with 0.5 mm profile height and lead-free matte tin finish. Its compact footprint occupies 5× less area than SOT-23 while maintaining mechanical robustness per AEC-Q101 stress testing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar complementary small-signal transistor applications.

Compared with BC846BPDW1T3G, DST847BPDP6 trades 20V lower breakdown for 5× smaller area and AEC-Q101 compliance-critical for space-limited automotive modules. Versus DMN3026LSD-13, it provides true bipolar gain and analog linearity essential for precision biasing, not just switching.

Availability

DST847BPDP6 is available at Aetrix Electronics and suitable for automotive lighting control, industrial sensor interfaces, portable audio amplification, and medical motor drive applications requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for DST847BPDP6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability components for automotive, industrial, and consumer markets since 1960.

The DST847BPDP6 belongs to Diodes' AEC-Q101-qualified small-signal transistor portfolio, engineered specifically for space-constrained, thermally demanding signal conditioning and switching in automotive ECUs and industrial control units.

FAQ

What is the maximum allowable junction temperature for continuous operation?

The DST847BPDP6 has an absolute maximum junction temperature of +150°C. Continuous operation at this limit requires strict adherence to thermal derating curves in Figure 3: at 100°C ambient, maximum power drops to ~120 mW; at 125°C ambient, it falls to zero. PCB layout must use the recommended 1 oz copper pad per AP02001 to achieve the specified R_θJA = 417°C/W.

Can Q1 and Q2 be used in a Darlington configuration?

No-Q1 (NPN) and Q2 (PNP) share no internal connection and have fully independent terminals. Their bases, emitters, and collectors are isolated. A Darlington pair requires direct collector-to-base interconnection between two transistors of the same polarity, which is physically impossible here without external wiring that would compromise layout density and introduce parasitic inductance.

Is the SOT-963 package compatible with standard reflow profiles for lead-free soldering?

Yes-the DST847BPDP6 uses matte tin annealed over copper leadframe and is qualified for Pb-free reflow per IPC/JEDEC J-STD-020. Peak temperature must not exceed 260°C for ≤30 seconds, with ramp rates ≤3°C/s pre- and post-peak. Moisture sensitivity level is MSL1, eliminating bake requirements prior to assembly.

How does the current gain matching between Q1 and Q2 impact differential circuit performance?

While Q1 and Q2 are manufactured on the same die, their h_FE ranges differ slightly (NPN: 200–470; PNP: 200–470 for I_C = –2mA, but 330–470 for I_C = –2.0mA). In matched-pair applications like current mirrors, gain mismatch introduces <±8% error in mirrored current at 25°C. For critical matching, designers should bin devices or use on-chip trimming in adjacent ICs rather than rely on inherent symmetry.