Vishay General Semiconductor - Diodes Division GSOT12C-E3-08
- Part No.:
- GSOT12C-E3-08
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
GSOT12C-E3-08.pdf
- Description:
- TVS DIODE 12VWM 26VC SOT23-3
- Quantity:
- Payment:

- Shipping:

Inventory:6,133
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Product details
Overview
GSOT12C-E3-08 from Vishay Semiconductors is a two-line bidirectional asymmetrical ESD protection diode in SOT-23 package, rated for 12 V reverse stand-off voltage, ±30 kV IEC 61000-4-2 ESD immunity, and 12 A peak pulse current (8/20 μs), used to safeguard high-speed data lines such as USB 2.0 or RS-485 interfaces against electrostatic discharge.
For engineers reviewing the GSOT12C-E3-08 datasheet, GSOT12C-E3-08 pinout, GSOT12C-E3-08 application, or GSOT12C-E3-08 equivalent, key selection factors include clamping voltage at 12 A (21.2–26 V), low 115–150 pF capacitance at 0 V bias, AEC-Q101 qualification readiness, and BiAs-mode dual-line protection capability with ground-referenced configuration.
Technical Context
The GSOT12C-E3-08 implements BiAs-MODE (Bidirectional Asymmetrical) protection: pins 1 and 2 connect to protected signal lines (L1/L2), pin 3 to ground, enabling independent clamping of positive transients via reverse-biased diodes and negative transients via forward conduction-resulting in lower forward clamping (~2.2 V at 12 A) versus reverse clamping (~21.2–26 V).
It supports BiSy-MODE (single-line symmetrical) operation when pin 3 is left unconnected and pins 1–2 form a differential pair across one line and ground, delivering matched positive/negative clamping using series diode conduction paths, with VRWM = 12.5 V and CD = 58–75 pF in that configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Immunity | ±30 kV contact & air discharge per IEC 61000-4-2 - meets automotive and industrial system-level ESD robustness requirements without external shielding. |
| Reverse Stand-off Voltage (VRWM) | 12 V - ensures no leakage or conduction during normal 12 V rail or data-line operation (e.g., CAN FD, LIN, or 12 V sensor interfaces). |
| Peak Pulse Current (IPPM) | 12 A (8/20 μs) - sustains surge events per IEC 61000-4-5 Level 3 without failure, suitable for industrial Ethernet or automotive body control modules. |
| Clamping Voltage (VC) | 21.2–26 V at 12 A - limits transient voltage seen by downstream ICs (e.g., transceivers or microcontrollers) to safe levels below absolute maximum ratings. |
| Capacitance (CD) | 115–150 pF at 0 V, 50 pF at 6 V - balances ESD protection strength with signal integrity for ≤10 Mbps data lines like RS-485 or CAN. |
| Leakage Current (IR) | ≤1 μA at 12 V - prevents measurable power loss or offset error in precision analog or low-power sensor circuits. |
| AEC-Q101 Qualified | Available in qualified version - enables use in automotive infotainment, ADAS camera links, and powertrain subsystems requiring stress-tested reliability. |
Pinout & Package
SOT-23 package (JEDEC TO-236AB), 3-pin surface-mount, 2.8 × 2.35 × 1.15 mm, MSL level 1, lead (Pb)-free e3 Sn plating, compatible with standard reflow profiles (peak 260 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Line 1 Anode / Cathode | Connects to first protected signal line (L1); forms one half of BiAs protection path to ground (pin 3). |
| Pin 2 | Line 2 Anode / Cathode | Connects to second protected signal line (L2); forms second BiAs path to ground (pin 3); interchangeable with pin 1 in layout. |
| Pin 3 | Ground Reference | Must be connected to system ground plane; provides common return for both protection diodes in BiAs mode. |
Key Features
| Feature | Design Value |
|---|---|
| Two-line ESD protection | Single SOT-23 device protects two independent data lines simultaneously-reduces BOM count and PCB area vs. dual discrete diodes. |
| Bidirectional asymmetrical (BiAs) clamping | Enables low-voltage negative clamping (~2.2 V at 12 A) while maintaining higher reverse clamping margin for positive surges-ideal for mixed-signal interfaces. |
| Low capacitance at operating bias | 50 pF at 6 V reverse bias minimizes signal distortion on 12 V logic or analog sensor outputs without compromising ESD margin. |
| Parallelable architecture | Two internal diodes can be operated in parallel to double IPPM (to 24 A) and halve effective clamping impedance-used in high-energy surge zones. |
| AEC-Q101 ready | Qualified variant available for automotive applications-supports temperature cycling (-55 °C to +150 °C) and HBM/MM/CDM ESD stress testing per AEC standard. |
Applications
| USB 2.0 Interface Protection | Automotive LIN Bus |
|---|---|
Use Scenario: Protects D+ and D− lines of USB 2.0 ports in automotive head units or industrial HMIs from ESD events during cable insertion. IC Role / Device Role / Timing Role: Bidirectional asymmetrical clamp referenced to chassis ground, absorbing ±30 kV discharges before transceiver ICs. Use Value: Prevents latch-up or damage to USB PHYs while maintaining <150 pF total line capacitance for full-speed (480 Mbps) signal integrity. | Use Scenario: Shields LIN bus master/slave nodes in body control modules from ESD coupling through wiring harnesses. IC Role / Device Role / Timing Role: Ground-referenced dual-line protector on LIN TX/RX lines, operating within 12 V vehicle electrical system. Use Value: Ensures >1 μA leakage at 12 V avoids false wake-up or battery drain; 21.2–26 V clamping keeps transceiver inputs within safe SOA. |
| Industrial RS-485 Transceivers | Smart Sensor Signal Conditioning |
Use Scenario: Installed on A/B differential pairs of RS-485 transceivers in factory automation PLCs exposed to field ESD. IC Role / Device Role / Timing Role: Two-channel asymmetrical ESD suppressor between bus lines and local ground, compliant with IEC 61000-4-2/4-5. Use Value: 12 A IPPM rating handles repetitive surges in noisy plant environments; 50 pF at 6 V bias preserves edge rate for ≤10 Mbps data rates. | Use Scenario: Protects analog output (0–10 V or 4–20 mA) and digital status lines of smart pressure/temperature sensors in HVAC systems. IC Role / Device Role / Timing Role: Dual-line protector for sensor's supply-sense and communication lines, operating at 12 V nominal rail. Use Value: ≤1 μA IR prevents loading of high-impedance analog outputs; 12 V VRWM matches common sensor supply rails without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| VGSOT12C | Successor series with identical SOT-23 footprint, same VRWM (12 V), but improved 15 A IPPM and lower 19–23 V clamping at 12 A. | Designed for new designs targeting extended surge margin and longer product lifecycle beyond January 2025 EOL date of GSOT12C-E3-08. | Select VGSOT12C for new designs requiring continued supply and enhanced performance; not drop-in due to revised thermal and electrical specs. |
| SMF12CTHE3_A/H | Single-line 12 V TVS (SOD-123), 12.5 V VRWM, 23.2 V VC at 12 A, 100 pF - lacks dual-line integration and BiAs functionality. | Requires two devices for dual-line protection; higher board space and routing complexity; no inherent asymmetry advantage. | Use only if dual-line integration is unnecessary and legacy SOD-123 layout constraints apply; verify total capacitance impact on signal lines. |
Compared with GSOT12C-E3-08, VGSOT12C offers higher surge robustness and post-EOL availability, while SMF12CTHE3_A/H delivers single-line simplicity at the cost of component count and lack of coordinated dual-line clamping behavior.
Availability
GSOT12C-E3-08 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, automotive LIN bus design, and industrial RS-485 transceiver applications requiring stable component supply ahead of its January 2025 end-of-life date.
Supply support for GSOT12C-E3-08 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in high-reliability diodes, MOSFETs, optoelectronics, and passive components for automotive, industrial, and computing markets.
The GSOTxxC family was developed specifically for compact, high-performance ESD protection of high-speed data and control lines in space-constrained, mission-critical systems-emphasizing low capacitance, precise clamping, and AEC-Q101 readiness.
FAQ
What is the primary protection mode of the GSOT12C-E3-08?
The GSOT12C-E3-08 operates primarily in BiAs-MODE (Bidirectional Asymmetrical), where pins 1 and 2 connect to two separate signal lines and pin 3 connects to ground. This configuration provides distinct clamping behavior: negative transients clamp near ground via forward conduction (~2.2 V at 12 A), while positive transients clamp at higher voltage via reverse breakdown (~21.2–26 V). The GSOT12C-E3-08 supports BiSy-MODE (single-line symmetrical) only when pin 3 is left unconnected.
Does the GSOT12C-E3-08 meet AEC-Q101 qualification requirements?
The GSOT12C-E3-08 is offered in an AEC-Q101 qualified version (e.g., GSOT12C-HE3-08), verified per stress test conditions including temperature cycling, humidity bias HAST, and ESD (HBM ≥ 8 kV). Standard GSOT12C-E3-08 is not automatically qualified-engineers must specify the "H" prefix variant and confirm qualification status via Vishay's official documentation before automotive deployment.
What is the maximum clamping voltage of the GSOT12C-E3-08 under full-rated surge current?
The GSOT12C-E3-08 exhibits a maximum reverse clamping voltage (VC) of 26 V at its rated peak pulse current of 12 A (8/20 μs waveform per IEC 61000-4-5). This value is measured across pins 1–3 or 2–3 with pin 3 grounded. At lower currents (e.g., 1 A), VC is 15.4–18.7 V. Forward clamping remains ≤2.2 V at 12 A, critical for protecting against negative transients.
Can the GSOT12C-E3-08 be used to protect a single data line instead of two?
Yes-the GSOT12C-E3-08 supports BiSy-MODE (bidirectional symmetrical) operation for single-line protection: connect pin 1 to the signal line, pin 2 to ground (or vice versa), and leave pin 3 unconnected. In this mode, it delivers VRWM = 12.5 V, CD = 58–75 pF, and clamping symmetry, though with reduced surge rating (12 A still applies) and higher capacitance than dedicated single-line TVS diodes.
What is the end-of-life timeline for the GSOT12C-E3-08 and recommended migration path?
Vishay has announced End of Life for the GSOT12C-E3-08 in January 2025. The officially recommended alternative is the VGSOT12C series, which maintains SOT-23 compatibility and 12 V VRWM while improving IPPM to 15 A and lowering clamping voltage. Migration requires validation of updated electrical parameters and thermal performance, as VGSOT12C is not a pin-compatible drop-in replacement for legacy GSOT12C-E3-08 designs.
GSOT12C-E3-08 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 12V (Max)
- Voltage - Breakdown (Min):
- 13.5V
- Voltage - Clamping (Max) @ Ipp:
- 26V
- Current - Peak Pulse (10/1000µs):
- 12A (8/20µs)
- Power - Peak Pulse:
- 312W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 115pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
GSOT12C-E3-08 FAQ
1.How can I place an order for GSOT12C-E3-08 through Aetrix?
Please submit a Request for Quotation (RFQ) for GSOT12C-E3-08 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for GSOT12C-E3-08 reliable?
The price and inventory of GSOT12C-E3-08 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for GSOT12C-E3-08 is usually 5 days.
3.What payment methods are accepted for GSOT12C-E3-08?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for GSOT12C-E3-08 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for GSOT12C-E3-08?
GSOT12C-E3-08 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your GSOT12C-E3-08 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for GSOT12C-E3-08?
For technical support, including GSOT12C-E3-08 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your GSOT12C-E3-08 requirements.
6.How does Aetrix verify that GSOT12C-E3-08 is sourced from the original manufacturer or authorized distributors?
All GSOT12C-E3-08 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that GSOT12C-E3-08 meets industry standards.
7.What is the process for return or replacement of GSOT12C-E3-08?
All GSOT12C-E3-08 units undergo pre-shipment inspection (PSI). If there is an issue with GSOT12C-E3-08, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The GSOT12C-E3-08 part is unused and in its original packaging.
Return procedure for GSOT12C-E3-08:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
GSOT12C-E3-08 Tags

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