Vishay General Semiconductor - Diodes Division GSOT12C-G3-18
- Part No.:
- GSOT12C-G3-18
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
GSOT12C-G3-18.pdf
- Description:
- TVS DIODE 12VWM 26VC SOT23
- Quantity:
- Payment:

- Shipping:

Inventory:3,798
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Product details
Overview
GSOT12C-G3-18 from Vishay Semiconductors is a two-line bidirectional asymmetrical ESD protection diode in SOT-23 package, rated for 12 V reverse stand-off voltage, ±30 kV IEC 61000-4-2 ESD immunity, and 12 A peak pulse current (8/20 μs), used to safeguard high-speed data lines such as USB 2.0 or RS-485 interfaces against transient overvoltage.
For engineers reviewing the GSOT12C-G3-18 datasheet, GSOT12C-G3-18 pinout, GSOT12C-G3-18 application, or GSOT12C-G3-18 equivalent, key selection criteria include clamping voltage at 12 A (≤26 V), low leakage (<1 μA at 12 V), 115–150 pF capacitance at 0 V, BiAs-mode dual-line operation, and AEC-Q101 qualification for automotive infotainment and body control modules.
Technical Context
The GSOT12C-G3-18 implements BiAs-MODE (Bidirectional Asymmetrical) protection: pins 1 and 2 connect to protected signal lines, pin 3 to ground, enabling independent clamping of positive transients (via reverse-biased diodes) and negative transients (via forward conduction). Its architecture delivers asymmetric clamping-lower forward voltage (~2.2 V at 12 A) for negative events versus higher reverse clamping (~26 V at 12 A).
It supports BiSy-MODE (single-line symmetrical) operation with pin 3 unconnected, using pins 1 and 2 as line-to-ground path, yielding 12.5 V VRWM and 23.4–28.1 V clamping at 12 A. Both modes comply with IEC 61000-4-2 (±30 kV) and AEC-Q101 H3B (>8 kV HBM).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protection Type | Two-line bidirectional asymmetrical (BiAs) or single-line bidirectional symmetrical (BiSy) |
| Reverse Stand-off Voltage (VRWM) | 12 V (BiAs mode); 12.5 V (BiSy mode) - defines maximum continuous operating voltage before clamping initiates |
| Peak Pulse Current (IPPM) | 12 A (8/20 μs waveform) - sustains surge events per IEC 61000-4-5 without failure |
| Clamping Voltage (VC) | 21.2–26 V at 12 A (BiAs); 23.4–28.1 V at 12 A (BiSy) - limits voltage seen by downstream IC during ESD strike |
| Capacitance (CD) | 115–150 pF at 0 V, 50 pF at 6 V (BiAs) - low enough for USB 2.0 (480 Mbps) and CAN FD signal integrity |
| ESD Immunity | ±30 kV contact & air discharge (IEC 61000-4-2) - exceeds industrial and automotive ESD robustness requirements |
| Leakage Current (IR) | ≤1 μA at 12 V - ensures minimal power loss and signal distortion in battery-powered systems |
Pinout & Package
SOT-23 package (JEDEC TO-236AB), 3-pin surface-mount, 2.8 × 2.35 × 1.15 mm, MSL Level 1, lead (Pb)-free e3 Sn plating, compatible with standard reflow profiles (peak ≤260 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Line 1 Anode (BiAs) / Line Terminal (BiSy) | Connects to first protected signal line (e.g., USB D+); in BiSy mode, serves as primary line-to-ground path |
| Pin 2 | Line 2 Anode (BiAs) / Ground Terminal (BiSy) | Connects to second protected signal line (e.g., USB D−); in BiSy mode, connects to system ground |
| Pin 3 | Common Cathode (BiAs) / Not Connected (BiSy) | Ground reference for dual-line protection; must be connected in BiAs mode, left floating in BiSy mode |
Key Features
| Feature | Design Value |
|---|---|
| BiAs-MODE dual-line protection | Enables simultaneous safeguarding of differential pairs (e.g., RS-485, LVDS) with shared ground return and independent clamping thresholds |
| AEC-Q101 qualification | Validated for automotive applications including infotainment head units and ADAS sensor interfaces under temperature cycling and humidity testing |
| Low clamping voltage asymmetry | Forward clamping ≤2.2 V at 12 A vs. reverse clamping ≤26 V - minimizes stress on receiver inputs during negative ESD events |
| Space-saving SOT-23 footprint | Reduces PCB area by >50% vs. discrete dual-diode solutions while maintaining full IEC 61000-4-2 compliance |
| e3 Sn termination | RoHS-compliant, lead-free finish compatible with Pb-free soldering processes and long-term reliability requirements |
Applications
| USB 2.0 Interface Protection | Automotive Body Control Module |
|---|---|
Use Scenario: Protecting USB 2.0 D+/D− lines in vehicle infotainment systems exposed to ESD during connector insertion. IC Role / Device Role / Timing Role: Two-line ESD clamp placed between USB connector and PHY IC, referenced to chassis ground. Use Value: 115–150 pF capacitance preserves 480 Mbps signal integrity; ±30 kV rating meets ISO 10605 automotive ESD test requirements. | Use Scenario: Safeguarding LIN bus signals in door module ECUs subject to load dump and human-body ESD. IC Role / Device Role / Timing Role: BiSy-mode configuration (pin 3 open) used for single-wire LIN line protection with ground reference. Use Value: 12.5 V VRWM matches LIN bus operating range; AEC-Q101 qualification ensures reliability across -40°C to +125°C ambient. |
| Industrial RS-485 Transceiver Port | Medical Patient Monitor Data Link |
Use Scenario: Shielding RS-485 half-duplex bus lines in factory automation PLCs from cable-induced surges and ESD. IC Role / Device Role / Timing Role: BiAs-mode dual-line clamp installed at connector entry point, with pin 3 tied to system ground plane. Use Value: 12 A IPPM handles IEC 61000-4-5 Level 4 surges; 50 pF capacitance at 6 V prevents signal edge degradation on 10 Mbps links. | Use Scenario: Securing isolated SPI or UART lines between patient monitor main board and detachable sensor pods. IC Role / Device Role / Timing Role: BiAs-mode protection on differential sensor interface lines, minimizing added capacitance to preserve low-noise analog front-end performance. Use Value: ≤1 μA leakage avoids DC offset errors in precision biopotential amplifiers; SOT-23 size enables placement near connectors in space-constrained enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| VGSOT12C-G3-18 | Successor device with identical pinout, same 12 V VRWM and ±30 kV ESD rating, but extended lifecycle beyond January 2025 EOL date of GSOT12C-G3-18 | Drop-in replacement for new designs; not recommended for legacy production continuity due to potential parametric drift in long-term supply | Select for new designs requiring guaranteed availability past 2025; verify layout compatibility via Vishay's VGSOTxxC footprint documentation |
| SMF12CTHE3_A/H | Single-line 12 V TVS diode in SOD-123 package; no dual-line capability; 15.4 V clamping at 1 A (vs. 15.4–18.7 V for GSOT12C-G3-18), higher 250 pF capacitance | Requires two devices for differential protection; unsuitable for space-constrained BiAs layouts; lacks AEC-Q101 qualification | Use only when dual-line integration is unnecessary and PCB area permits discrete implementation |
Compared with VGSOT12C-G3-18 and SMF12CTHE3_A/H, the GSOT12C-G3-18 uniquely delivers integrated two-line ESD protection in SOT-23 with AEC-Q101 qualification and optimized capacitance for high-speed interfaces-making it irreplaceable in compact automotive and industrial differential data links where footprint and certification are critical.
Availability
GSOT12C-G3-18 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, automotive body control modules, and industrial RS-485 transceiver ports requiring stable component supply through its end-of-life date in January 2025.
Supply support for GSOT12C-G3-18 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in power management, sensing, and circuit protection components with emphasis on reliability and automotive-grade qualification.
The GSOT12C-G3-18 belongs to Vishay's GSOTxxC family of bidirectional ESD protection diodes, designed specifically for high-density, high-reliability protection of differential and single-ended data lines in automotive, industrial, and medical electronics.
FAQ
What is the maximum operating temperature range for the GSOT12C-G3-18?
The GSOT12C-G3-18 has a junction temperature range of -55 °C to +150 °C and a storage temperature range of -55 °C to +150 °C, making it suitable for under-hood automotive applications and industrial environments with wide thermal excursions. This specification is confirmed in the Absolute Maximum Ratings table for GSOT12C on page 3 of Vishay document 85824.
Can the GSOT12C-G3-18 be used in BiSy-MODE for single-line protection?
Yes, the GSOT12C-G3-18 supports BiSy-MODE operation: leave pin 3 unconnected, connect pin 1 to the signal line and pin 2 to ground (or vice versa). In this configuration, it provides 12.5 V VRWM and clamps at 23.4–28.1 V for 12 A pulses, as specified in the "ELECTRICAL CHARACTERISTICS GSOT12C" section on page 9 of Vishay document 85824.
What is the typical capacitance of the GSOT12C-G3-18 at 6 V reverse bias?
The typical capacitance of the GSOT12C-G3-18 is 50 pF at 6 V reverse bias and 1 MHz frequency, as stated in the "ELECTRICAL CHARACTERISTICS GSOT12C" table on page 7 of Vishay document 85824. This low bias-dependent capacitance helps maintain signal integrity on medium-speed data lines.
Is the GSOT12C-G3-18 qualified to AEC-Q101?
Yes, the GSOT12C-G3-18 is AEC-Q101 qualified, as explicitly noted in the FEATURES section on page 1 of Vishay document 85824. This qualification covers stress tests including HBM (>8 kV), temperature cycling, and high-temperature operating life, validating its use in automotive electronics.
What is the peak pulse power rating of the GSOT12C-G3-18 in BiAs-MODE?
In BiAs-MODE (pins 1–3 or 2–3), the GSOT12C-G3-18 has a peak pulse power rating of 312 W at 12 A, 8/20 μs waveform, per the ABSOLUTE MAXIMUM RATINGS table on page 3 of Vishay document 85824. This value reflects energy dissipation capability during standardized surge events.
GSOT12C-G3-18 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 12V (Max)
- Voltage - Breakdown (Min):
- 13.5V
- Voltage - Clamping (Max) @ Ipp:
- 26V
- Current - Peak Pulse (10/1000µs):
- 12A (8/20µs)
- Power - Peak Pulse:
- 312W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 115pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
GSOT12C-G3-18 FAQ
1.How can I place an order for GSOT12C-G3-18 through Aetrix?
Please submit a Request for Quotation (RFQ) for GSOT12C-G3-18 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for GSOT12C-G3-18 reliable?
The price and inventory of GSOT12C-G3-18 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for GSOT12C-G3-18 is usually 5 days.
3.What payment methods are accepted for GSOT12C-G3-18?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for GSOT12C-G3-18 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for GSOT12C-G3-18?
GSOT12C-G3-18 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your GSOT12C-G3-18 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for GSOT12C-G3-18?
For technical support, including GSOT12C-G3-18 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your GSOT12C-G3-18 requirements.
6.How does Aetrix verify that GSOT12C-G3-18 is sourced from the original manufacturer or authorized distributors?
All GSOT12C-G3-18 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that GSOT12C-G3-18 meets industry standards.
7.What is the process for return or replacement of GSOT12C-G3-18?
All GSOT12C-G3-18 units undergo pre-shipment inspection (PSI). If there is an issue with GSOT12C-G3-18, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The GSOT12C-G3-18 part is unused and in its original packaging.
Return procedure for GSOT12C-G3-18:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
GSOT12C-G3-18 Tags

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