My Inquiry
My Account
Vishay General Semiconductor - Diodes Division GSOT36C-E3-18
- Part No.:
- GSOT36C-E3-18
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
GSOT36C-E3-18.pdf
- Description:
- TVS DIODE 36VWM 71VC SOT23
- Quantity:
- Payment:
- Shipping:
Inventory:24,407
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
GSOT36C-E3-18 from Vishay Semiconductors is a two-line bidirectional asymmetrical ESD protection diode in SOT-23 package, rated for ±30 kV IEC 61000-4-2 contact/air discharge, 36 V reverse stand-off voltage (VRWM), and 3.5 A peak pulse current (IPPM). It protects high-speed data lines such as USB 2.0, HDMI, or industrial sensor interfaces against transient overvoltage events.
For engineers reviewing the GSOT36C-E3-18 datasheet, GSOT36C-E3-18 pinout, GSOT36C-E3-18 application, or GSOT36C-E3-18 equivalent, key selection criteria include clamping voltage at 3.5 A (≤71 V), low 26–33 pF capacitance at 0 V bias, AEC-Q101 qualification readiness, and BiAs-mode dual-line protection capability.
Technical Context
The GSOT36C-E3-18 implements BiAs-MODE (Bidirectional Asymmetrical) protection: pins 1 and 2 connect to protected signal lines, pin 3 to ground, enabling independent clamping of positive transients (via reverse-biased diodes) and negative transients (via forward conduction). Its asymmetry yields lower forward clamping (~1.3 V at 3.5 A) versus reverse clamping (~59–71 V).
It also supports BiSy-MODE (single-line symmetrical operation) with pin 3 unconnected-pins 1 and 2 forming a bipolar path-delivering matched ±50–60 V clamping at 1 A and 36.5 V VRWM. Both modes operate across –55 °C to +150 °C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating | ±30 kV contact & air discharge per IEC 61000-4-2 - meets highest system-level ESD immunity requirements without external shielding. |
| Reverse Stand-off Voltage (VRWM) | 36 V - ensures no leakage or conduction during normal 3.3 V, 5 V, or 24 V interface operation; compatible with industrial I/O and automotive sensor buses. |
| Peak Pulse Current (IPPM) | 3.5 A per line (IEC 61000-4-5, 8/20 μs) - sustains surge events typical of inductive load switching or lightning-induced coupling in control systems. |
| Clamping Voltage (VC) | ≤71 V at IPPM = 3.5 A (pin 1–3 or 2–3) - limits downstream IC stress below 75 V absolute maximum ratings of common microcontrollers and PHYs. |
| Capacitance (CD) | 26–33 pF at 0 V, 1 MHz - preserves signal integrity on 480 Mbps USB 2.0 or 100 Mbps Ethernet links without measurable rise-time degradation. |
| Operating Temperature | –55 °C to +150 °C - qualified for under-hood automotive, industrial motor drives, and outdoor telecom equipment. |
Pinout & Package
SOT-23 package (JEDEC TO-236AB), 3-pin, e3 Sn-plated, MSL level 1, 8.8 mg weight, UL 94 V-0 molding compound. Compatible with standard reflow profiles up to 260 °C peak.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Line 1 Anode / Cathode | Connects to first protected signal line (e.g., USB D+); forms one half of BiAs protection path to ground (pin 3). |
| Pin 2 | Line 2 Anode / Cathode | Connects to second protected signal line (e.g., USB D−); forms second half of BiAs path to ground (pin 3). |
| Pin 3 | Ground Terminal | Low-inductance connection to system ground plane; essential for BiAs mode; must be short-traced to minimize clamping overshoot. |
Key Features
| Feature | Design Value |
|---|---|
| Two-line BiAs protection | Enables simultaneous protection of differential pairs (e.g., RS-485, CAN FD) with asymmetric clamping optimized for noise rejection and low forward voltage. |
| AEC-Q101 qualification option | Supports automotive-grade reliability validation (HTOL, TC, UHAST) - required for body control modules and ADAS sensor interfaces. |
| Low 1 μA IR at VR = 36 V | Minimizes standby power loss and prevents false triggering in high-impedance sensor front-ends or battery-powered IoT nodes. |
| BiSy single-line mode | Allows reuse as symmetrical protector (pin 3 open) for legacy UART or analog sensor lines - reduces BOM count across product families. |
| e3 matte tin termination | RoHS-compliant, lead-free, and compatible with Pb-free soldering; eliminates whisker risk in long-life industrial deployments. |
Applications
| USB 2.0 Interface Protection | Industrial RS-485 Transceiver Protection |
|---|---|
Use Scenario: Protecting USB 2.0 D+/D− lines on embedded host controllers exposed to user-accessible ports. IC Role / Device Role / Timing Role: ESD transient suppressor placed immediately before the USB PHY, operating in BiAs mode with pin 3 grounded. Use Value: 26–33 pF capacitance avoids signal integrity degradation at 480 Mbps; ±30 kV rating exceeds IEC 61000-4-2 Level 4 immunity testing. |
Use Scenario: Safeguarding RS-485 transceivers in factory automation PLCs subject to cable discharge events and ground loop surges. IC Role / Device Role / Timing Role: Dual-line clamp on A/B differential bus lines, leveraging BiAs mode to maintain common-mode noise rejection during transients. Use Value: 36 V VRWM accommodates RS-485's ±12 V common-mode range; 3.5 A IPPM handles worst-case induced surges per IEC 61000-4-5. |
| Automotive Sensor Signal Conditioning | Smart Meter Communication Interface |
Use Scenario: Protecting LIN or SENT sensor lines in engine control units where space and thermal constraints limit TVS array use. IC Role / Device Role / Timing Role: Single-device solution for two-wire sensor signals, operating in BiAs mode with direct ground tie to chassis. Use Value: –55 °C to +150 °C rating matches under-hood ambient; AEC-Q101 option enables full automotive qualification traceability. |
Use Scenario: Securing HPLC or NB-IoT modem interfaces in utility smart meters deployed in electrically noisy substations. IC Role / Device Role / Timing Role: BiSy-mode protector on UART or SPI lines connecting meter SoC to communication module, with pin 3 floating. Use Value: 36.5 V VRWM supports 3.3 V/5 V logic levels while rejecting 1 kV surge pulses; 1 μA leakage preserves battery life in 10-year deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| VGSOT36C | Direct replacement family announced by Vishay as EOL successor; identical SOT-23 footprint, same 36 V VRWM and ±30 kV ESD rating, improved leakage (<0.5 μA at 36 V). | Designed for drop-in replacement in new designs; supports same BiAs/BiSy modes and temperature range. | Select VGSOT36C for new designs targeting production beyond January 2025; verify layout compatibility using Vishay's updated land pattern. |
| SMF36A | Single-line unidirectional TVS (SOD-123), 36 V VRWM, 5.5 A IPPM, but lacks dual-line integration and BiAs functionality. | Requires two devices plus routing for differential protection; higher board area and parasitic inductance than GSOT36C-E3-18. | Use only when dual-line integration is unnecessary and higher surge margin justifies added component count and layout complexity. |
Compared with SMF36A, GSOT36C-E3-18 reduces component count by 50% and PCB area by >60% for differential protection, while maintaining system-level ESD robustness; compared with VGSOT36C, it offers identical electrical performance but lacks the newer generation's enhanced leakage and lifetime reliability metrics.
Availability
GSOT36C-E3-18 is available at Aetrix Electronics and suitable for industrial automation, automotive sensor interfaces, and smart metering applications requiring stable component supply through its end-of-life date in January 2025.
Supply support for GSOT36C-E3-18 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in high-reliability diodes, MOSFETs, optoelectronics, and protection devices for automotive, industrial, and computing markets.
The GSOTxxC series was developed specifically for compact, high-performance ESD protection of high-speed and high-voltage data lines, emphasizing low capacitance, precise clamping, and AEC-Q101 readiness.
FAQ
What protection modes does the GSOT36C-E3-18 support?
The GSOT36C-E3-18 supports two distinct protection configurations: BiAs-MODE (bidirectional asymmetrical) with pin 3 grounded for dual-line protection of differential interfaces, and BiSy-MODE (bidirectional symmetrical) with pin 3 unconnected for single-line applications. Both modes are explicitly defined in the Vishay GSOT03C–GSOT36C datasheet Rev. 3.0 and validated per IEC 61000-4-2 and -4-5.
Is GSOT36C-E3-18 qualified to AEC-Q101?
GSOT36C-E3-18 is offered in an AEC-Q101-qualified version (marked with "-HE3-18" or "-HG3-18" suffixes); the "-E3-18" variant is standard-grade. The AEC-Q101 qualification covers HTOL, temperature cycling, and unbiased HAST testing per stress conditions defined in the AEC specification, confirming suitability for automotive under-hood applications.
What is the maximum clamping voltage of GSOT36C-E3-18 at its rated peak pulse current?
At its rated peak pulse current of 3.5 A (IEC 61000-4-5, 8/20 μs waveform), the GSOT36C-E3-18 exhibits a maximum reverse clamping voltage of 71 V (pin 1–3 or pin 2–3), and a maximum forward clamping voltage of 1.3 V. These values are specified in the "ELECTRICAL CHARACTERISTICS GSOT36C" table on page 8 of the Vishay document 85824 Rev. 3.0.
Can GSOT36C-E3-18 be used to protect a 24 V industrial Ethernet line?
Yes - GSOT36C-E3-18's 36 V VRWM provides 50% headroom above a 24 V nominal bus, ensuring no conduction during normal operation. Its 3.5 A IPPM and ≤71 V clamping voltage effectively suppress surges per IEC 61000-4-5, making it suitable for protecting PHY-level interfaces in industrial Ethernet nodes, provided pin 3 is solidly grounded with minimal inductance.
What is the capacitance of GSOT36C-E3-18 at 18 V reverse bias?
At 18 V reverse bias and 1 MHz frequency, the GSOT36C-E3-18 exhibits a typical capacitance of 12 pF (maximum 12 pF), as specified in the "ELECTRICAL CHARACTERISTICS GSOT36C" table (page 8, VR = 18 V row). This ultra-low bias-dependent capacitance supports clean signal transmission in high-voltage analog and digital interfaces.
GSOT36C-E3-18 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 36V (Max)
- Voltage - Breakdown (Min):
- 39V
- Voltage - Clamping (Max) @ Ipp:
- 71V
- Current - Peak Pulse (10/1000µs):
- 3.5A (8/20µs)
- Power - Peak Pulse:
- 248W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 52pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
GSOT36C-E3-18 FAQ
1.How can I place an order for GSOT36C-E3-18 through Aetrix?
Please submit a Request for Quotation (RFQ) for GSOT36C-E3-18 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for GSOT36C-E3-18 reliable?
The price and inventory of GSOT36C-E3-18 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for GSOT36C-E3-18 is usually 5 days.
3.What payment methods are accepted for GSOT36C-E3-18?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for GSOT36C-E3-18 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for GSOT36C-E3-18?
GSOT36C-E3-18 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your GSOT36C-E3-18 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for GSOT36C-E3-18?
For technical support, including GSOT36C-E3-18 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your GSOT36C-E3-18 requirements.
6.How does Aetrix verify that GSOT36C-E3-18 is sourced from the original manufacturer or authorized distributors?
All GSOT36C-E3-18 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that GSOT36C-E3-18 meets industry standards.
7.What is the process for return or replacement of GSOT36C-E3-18?
All GSOT36C-E3-18 units undergo pre-shipment inspection (PSI). If there is an issue with GSOT36C-E3-18, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The GSOT36C-E3-18 part is unused and in its original packaging.
Return procedure for GSOT36C-E3-18:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
GSOT36C-E3-18 Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
