Analog Devices Inc. HMC1120LP4E
- Part No.:
- HMC1120LP4E
- Manufacturer:
- Analog Devices Inc.
- Category:
- RF Detectors
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
HMC1120LP4E.pdf
- Description:
- IC RF DETECT 0HZ-3.9GHZ 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,623
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HMC1120LP4E from Analog Devices (formerly Hittite Microwave) is a dual-function RF power detector integrating an RMS detector and high-bandwidth envelope tracker in a single 24-lead 4×4 mm SMT package. It delivers ±1 dB RMS detection accuracy from DC to 3.9 GHz over −62 dBm to +8 dBm input range and ±1 dB envelope tracking accuracy across >30 dB dynamic range with >150 MHz modulation bandwidth - enabling precise real-time power monitoring and envelope extraction in LTE/WCDMA base station transmitters.
For engineers reviewing the HMC1120LP4E datasheet, HMC1120LP4E pinout, HMC1120LP4E application, or HMC1120LP4E equivalent, this page provides verified technical context on its dual-output architecture, digitally programmable integration bandwidth (SCI1–SCI4), temperature-compensated logarithmic slope (34.4 mV/dB typical at 100 MHz), internal op-amp buffered RMSOUT stage, and envelope tracking disable (ETDISABLE) control - all critical for PA linearization and fast RF over-power protection design.
Technical Context
The HMC1120LP4E implements two independent signal paths: a full-wave rectifier + log/antilog + digitally adjustable integrator for RMS power measurement, and a high-speed envelope detector with >150 MHz bandwidth delivering linear voltage output proportional to instantaneous RF amplitude. Its RMS core features active DC offset cancellation and on-chip temperature compensation to maintain ±1 dB error across −40 °C to +85 °C.
Digital SCI1–SCI4 inputs configure integration time constants across >4 decades, directly trading transient response speed (e.g., 0.162 µs rise time at SCI=0000) against measurement accuracy and ripple suppression (e.g., 42.57 µs fall time at SCI=1000). The ETOUT output supports two modes - instantaneous envelope tracking and peak-hold - selected via MODE_SEL, with dedicated PH_CAP pin for droop rate tuning.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Frequency Range | DC to 3.9 GHz - supports full-band LTE/WCDMA/GSM operation without external matching networks. |
| RMS Detection Accuracy | ±1 dB from −62 dBm to +8 dBm at 1900 MHz - enables reliable TSSI/RSSI in multi-standard base stations. |
| Envelope Bandwidth | >150 MHz - captures high-crest-factor LTE 20 MHz signals with <0.15 dB deviation at +85 °C. |
| Logarithmic Slope (RMSOUT) | 34.4 mV/dB typical at 100 MHz - sets gain for downstream ADC interface; varies ≤3 mV/dB across 100–3900 MHz. |
| Supply Current | 77–90 mA at VCC = 3.3 V, no RF input - defines thermal budget for dense RF front-end layouts. |
| Digital Integration Control | SCI1–SCI4 pins select 16 integration settings - allows real-time adaptation to modulation bandwidth and crest factor. |
| Operating Temperature | −40 °C to +85 °C - qualified for outdoor macrocell and small-cell wireless infrastructure environments. |
Pinout & Package
24-lead 4×4 mm LFCSP package (RoHS-compliant low-stress plastic, matte Sn plating, MSL1 rating) with exposed ground paddle requiring soldering to PCB RF ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 20–21, 23 | VCC | Bias supply inputs - decoupling required per pin to suppress high-frequency noise coupling into RMS/ET paths. |
| 2, 22 | GND | Ground connections tied to exposed paddle - must be soldered to solid RF ground plane with multiple vias. |
| 3, 4 | INP / INN | Single-ended RF input pair - 100 Ω differential input impedance; operates with standard 50 Ω source via DC blocking caps. |
| 7 | ETOUT | Linear envelope output - requires 604 Ω load to GND for specified 150 MHz bandwidth and 1.35 V/V gain. |
| 15 | RMSOUT | Temperature-compensated logarithmic RMS output - buffered by internal op-amp for direct ADC interfacing. |
| 16–19 | SCI1–SCI4 | Digital integration bandwidth controls - MSB = SCI4; SCI=0000 gives fastest response (0.162 µs rise), SCI=1111 gives max filtering. |
| 24 | EN | Global enable - pull low to reduce supply current to 7–12 mA standby mode; essential for power-gated RF subsystems. |
Key Features
| Feature | Design Value |
|---|---|
| Dual simultaneous outputs | RMSOUT (logarithmic, linear-in-dB) and ETOUT (linear, instantaneous envelope) - eliminates need for separate detectors in envelope-tracking PAs. |
| Digitally programmable integration | SCI1–SCI4 select 16 discrete bandwidths - enables one hardware platform to support CW, GSM, WCDMA, and LTE with optimal settling vs. accuracy trade-off. |
| Temperature-stable RMS accuracy | ±1 dB error maintained across −40 °C to +85 °C using on-chip compensation - reduces system-level calibration overhead. |
| High-speed envelope tracking | ETOUT slew rate 210/242 MV/s (rise/fall) - supports real-time PA bias modulation for >100 MHz LTE carriers. |
| Configurable envelope modes | MODE_SEL pin selects instantaneous tracking or peak-hold; PH_CAP pin adjusts droop rate - adapts to burst-mode or continuous transmission. |
Applications
| Base Station Transmitter Power Control | PA Linearization Feedback Path |
|---|---|
Use Scenario: Real-time closed-loop control of RF power amplifier output in LTE macrocell BTS. IC Role / Device Role / Timing Role: HMC1120LP4E provides RMSOUT as average power feedback and ETOUT as instantaneous envelope reference for digital predistortion (DPD) engine. Use Value: Enables >30 dB ACLR improvement by feeding accurate, low-latency envelope data to DPD lookup tables - critical for meeting 3GPP spectral mask requirements. |
Use Scenario: Dynamic bias adjustment of GaN PA in envelope-tracking architecture. IC Role / Device Role / Timing Role: HMC1120LP4E's ETOUT drives the drain supply modulator while RMSOUT monitors long-term power drift. Use Value: Achieves >15% PA efficiency gain at back-off by synchronizing supply voltage to RF envelope - validated with LTE 20 MHz signals up to 3.9 GHz. |
| Receiver Automatic Gain Control | Fast RF Over-Power Protection |
Use Scenario: Adaptive gain setting in wideband receiver front-end for variable signal strength environments. IC Role / Device Role / Timing Role: HMC1120LP4E RMSOUT feeds AGC loop controller; its wide 70 dB sensing range covers weak cellular and strong interference signals. Use Value: Maintains consistent IF signal level across −62 dBm to +8 dBm input - prevents ADC saturation and preserves SNR in multi-carrier receivers. |
Use Scenario: Sub-microsecond shutdown trigger for PA during antenna mismatch or cable fault events. IC Role / Device Role / Timing Role: HMC1120LP4E ETOUT output drives comparator circuit; peak-hold mode with PH_CAP extends hold time for reliable latch detection. Use Value: Responds within 154 µs (peak hold time) to sudden RF excursions - protects expensive GaN PAs from thermal runaway without relying on slower digital interfaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power detection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADL5511ACPZ-R7 | Single-path RMS detector only (no envelope output); 100 MHz–6 GHz range; 35 dB dynamic range (±1 dB). | Lacks ETOUT functionality - cannot support envelope-tracking PA or DPD feedback; requires external envelope detector for dual-path use cases. | Select when only average power measurement is needed and board space is constrained; not suitable for PA linearization. |
| LT5581IDCB#TRMPBF | True RMS detector with 40 dB range (−55 to −15 dBm); 10 MHz–6 GHz; no digital integration control or envelope output. | No SCI programming or ETOUT - limited to narrow-range, fixed-bandwidth applications like RSSI in IoT receivers. | Choose for ultra-low-power (<10 mA) portable designs where envelope tracking is unnecessary and cost is primary constraint. |
Compared with ADL5511ACPZ-R7 and LT5581IDCB#TRMPBF, the HMC1120LP4E uniquely integrates both RMS and envelope functions with programmable bandwidth and industrial temperature range - making it the only option among the three capable of full-envelope-tracking PA implementation in macrocell infrastructure.
Availability
HMC1120LP4E is available at Aetrix Electronics and suitable for LTE base station transmitters, small-cell radio units, and RF test equipment requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for HMC1120LP4E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Hittite Microwave in 2014, inheriting its high-performance RF/Microwave portfolio focused on wireless infrastructure, defense, and test instrumentation.
The HMC1120LP4E belongs to Hittite's precision RF power detector product line, engineered specifically for envelope-tracking PA architectures and multi-standard wireless base stations demanding simultaneous RMS and envelope measurement.
FAQ
What is the maximum RF input frequency supported by the HMC1120LP4E?
The HMC1120LP4E supports RF input frequencies from DC to 3.9 GHz, verified across all operating conditions including full temperature range (−40 °C to +85 °C) and input power levels from −62 dBm to +8 dBm. Performance data confirms ±1 dB RMS detection accuracy up to 3.9 GHz with LTE 20 MHz modulation, making it suitable for 5G sub-6 GHz bands and legacy LTE/WCDMA deployments.
How does the SCI1–SCI4 digital control affect the HMC1120LP4E's transient response?
The SCI1–SCI4 pins configure the RMS detector's integration time constant across 16 discrete settings. At SCI=0000, RMSOUT rise time is 0.162 µs (for 0 dBm input), enabling fast response to burst signals; at SCI=1000, rise time extends to 2.65 µs and fall time to 42.57 µs, improving ripple rejection for CW or low-crest-factor waveforms. This allows runtime adaptation to modulation type without hardware changes.
Can the HMC1120LP4E operate with single-ended 50 Ω RF sources without external baluns?
Yes - the HMC1120LP4E integrates a broadband single-ended input interface with 100 Ω differential input impedance between pins 3 (INP) and 4 (INN). When driven by a standard 50 Ω source with DC blocking capacitors, it achieves >12 dB input return loss up to 3.9 GHz, eliminating the need for external baluns or matching networks and reducing PCB area and insertion loss.
What is the purpose of the PH_CAP pin on the HMC1120LP4E?
The PH_CAP pin connects to an external capacitor that sets the droop rate in PEAK_HOLD mode of the ETOUT output. Larger capacitance values extend the hold time before voltage decay - for example, with no external capacitor, peak hold time is 154 µs; adding capacitance increases this duration, enabling reliable capture of short RF bursts in over-power protection circuits.
Does the HMC1120LP4E require system-level calibration for absolute accuracy?
Yes - due to part-to-part variations in logarithmic slope (±0.5 mV/dB) and intercept (±0.5 dBm), system-level calibration is recommended to meet stringent absolute accuracy requirements. The HMC1120LP4E's internal temperature compensation maintains ±1 dB relative accuracy, but end-equipment calibration against known RF sources ensures traceable power measurement in final products like BTS radios.
HMC1120LP4E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Packaging:
- Strip
- Product Status:
- Active
- Frequency:
- 0Hz ~ 3.9GHz
- RF Type:
- -
- Input Range:
- -60dBm ~ 8dBm
- Accuracy:
- ±1dB
- Voltage - Supply:
- 3.15V ~ 3.45V
- Mounting Type:
- 100 mA
- Supplier Device Package:
- Surface Mount
- Current - Supply:
- 24-QFN (4x4)
HMC1120LP4E FAQ
1.How can I place an order for HMC1120LP4E through Aetrix?
Please submit a Request for Quotation (RFQ) for HMC1120LP4E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HMC1120LP4E reliable?
The price and inventory of HMC1120LP4E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HMC1120LP4E is usually 5 days.
3.What payment methods are accepted for HMC1120LP4E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HMC1120LP4E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HMC1120LP4E?
HMC1120LP4E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HMC1120LP4E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HMC1120LP4E?
For technical support, including HMC1120LP4E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HMC1120LP4E requirements.
6.How does Aetrix verify that HMC1120LP4E is sourced from the original manufacturer or authorized distributors?
All HMC1120LP4E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HMC1120LP4E meets industry standards.
7.What is the process for return or replacement of HMC1120LP4E?
All HMC1120LP4E units undergo pre-shipment inspection (PSI). If there is an issue with HMC1120LP4E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HMC1120LP4E part is unused and in its original packaging.
Return procedure for HMC1120LP4E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HMC1120LP4E Tags

-
LMH2110TMX/NOPB
Texas Instruments

-
MAX2204EXK+T
Analog Devices Inc./Maxim Integrated

-
LMV221SD/NOPB
Texas Instruments

-
LTC5505-2ES5#TRMPBF
Analog Devices Inc.

-
LTC5505-1ES5#TRMPBF
Analog Devices Inc.

-
AD8314ACPZ-RL7
Analog Devices Inc.

-
ADL5506ACBZ-R7
Analog Devices Inc.

-
AD8312ACBZ-P7
Analog Devices Inc.

-
MAX4003EUA+T
Analog Devices Inc./Maxim Integrated

-
LTC5530ES6#TRMPBF
Analog Devices Inc.

-
LTC5507ES6#TRMPBF
Analog Devices Inc.

-
LTC5507ES6#TRPBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
