Analog Devices Inc. HMC981LP3ETR

Overview

HMC981LP3ETR from Analog Devices is an active bias controller IC that automatically adjusts gate voltage to maintain constant drain current (20–200 mA) for Class-A RF amplifiers-supporting both enhancement and depletion modes across 4–12 V drain supply. It integrates negative voltage generation (−2.5 V), dual-gate control (VGATE/VG2), and daisy-chain sequencing via TRIG_OUT, enabling stable bias in microwave radio, fiber optic modulator drivers, and cellular base station power amplifier stages.

For engineers reviewing the HMC981LP3ETR datasheet, HMC981LP3ETR pinout, HMC981LP3ETR application, or HMC981LP3ETR equivalent, this page delivers verified specifications including R_{DS_ON} switching (5–10 Ω), ±0.8 mA gate drive capability, −40°C to +85°C operation, 3×3 mm QFN package with exposed thermal pad, and mode-selectable biasing for depletion/enhancement amplifiers.

Technical Context

The HMC981LP3ETR implements a closed-loop active bias control architecture using ISENSE feedback to regulate IDRAIN via VGATE, compensating for temperature, supply, and process variations without calibration. Its internal charge pump generates −2.5 V for depletion-mode devices, while VG2 provides adjustable second-gate control for dual-gate amplifiers.

Power-up sequencing enforces safe amplifier turn-on: VGATE pulls to VNEG first, then VDRAIN ramps, followed by VG2-ensuring pinch-off before drain voltage application. TRIG_OUT enables synchronized multi-amplifier chains, and SW pin selects R_{DS_ON} (5 Ω at VDIG, 10 Ω at GND) to minimize VDD-to-VDRAIN drop per Equation (1).

Key Specifications

Pinout & Package

Package: 16-lead 3×3 mm QFN (RoHS-compliant, exposed thermal pad, MSL1, matte tin finish). Thermal pad must be soldered to PCB ground for optimal thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar active bias controller applications.

Compared with LM334Z and MAX1132BCPP+, the HMC981LP3ETR delivers fully integrated, sequenced, and protected bias control in a single 3×3 mm package-reducing design risk, BOM count, and qualification effort for RF amplifier applications demanding >100 mA and −40°C to +85°C operation.

Availability

HMC981LP3ETR is available at Aetrix Electronics and suitable for microwave radio, fiber optic modulator driver, and cellular base station applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for HMC981LP3ETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and RF ICs, serving communications, industrial, automotive, and defense markets with precision signal processing solutions.

The HMC981LP3ETR belongs to Analog Devices' Hittite Microwave bias controller product line, designed specifically for automated, calibration-free RF amplifier biasing in demanding microwave and millimeter-wave infrastructure systems.

FAQ

What is the primary function of the HMC981LP3ETR in an RF amplifier stage?

The HMC981LP3ETR serves as an active bias controller that automatically regulates gate voltage to maintain a precise, temperature-stable drain current (20–200 mA) for Class-A RF amplifiers. It replaces manual bias networks and eliminates calibration by continuously adjusting VGATE based on ISENSE feedback-ensuring consistent RF performance across supply, temperature, and process variation without user intervention. The HMC981LP3ETR achieves this while supporting both enhancement and depletion-mode devices.

How does the HMC981LP3ETR generate its negative bias voltage, and can it be disabled?

The HMC981LP3ETR integrates a charge pump circuit that generates −2.5 V at the VNEG pin for depletion-mode amplifier biasing. This function is enabled by leaving VNEGFB and VGATEFB floating (Mode 1). It can be fully disabled by grounding both VNEGFB and VGATEFB (Mode 3), allowing the device to bias enhancement-mode amplifiers using only positive supplies. When disabled, the VNEG pin must be tied to GND-not left floating-to ensure proper operation of the HMC981LP3ETR.

What is the role of the TRIGOUT pin on the HMC981LP3ETR, and how is it used in system design?

The TRIGOUT pin (Pin 13) outputs a 3.5 V logic HIGH signal once the HMC981LP3ETR's VDRAIN output has stabilized and the active bias loop is fully operational. This signal is used to daisy-chain multiple HMC981LP3ETR devices-enabling one unit to trigger the EN pin of the next, ensuring deterministic, staggered power-up of amplifier chains. In multi-stage RF systems like fiber optic drivers or phased-array transceivers, TRIGOUT eliminates timing uncertainty and prevents current surges that could destabilize shared supply rails.

Can the HMC981LP3ETR bias dual-gate amplifiers, and how is the second gate voltage controlled?

Yes, the HMC981LP3ETR supports dual-gate amplifiers via its VG2 output. The second gate voltage is set by applying a control voltage to the VG2CONT pin using a resistor divider between VDD and GND; VG2 is typically 1.3 V lower than VG2CONT. This allows independent adjustment of VG2 for amplifiers requiring separate gate biasing-such as certain GaN HEMTs or specialized MMICs. The HMC981LP3ETR sequences VG2 activation after VDRAIN during power-up to prevent latch-up, and the VG2 output can sink/source up to ±1 mA as needed.

What are the absolute maximum ratings for the HMC981LP3ETR, and why is thermal management critical?

The HMC981LP3ETR has an absolute maximum junction temperature of 125°C, continuous power dissipation of 0.77 W at 85°C (derating 19.19 mW/°C above), and thermal resistance of 52.1°C/W (junction-to-package bottom). Because it drives up to 200 mA at up to 12 V into the amplifier drain-and dissipates heat in its internal switch and charge pump-the exposed thermal pad must be soldered to a large PCB ground plane. Failure to do so risks exceeding junction temperature limits under sustained load, triggering thermal shutdown or long-term reliability degradation of the HMC981LP3ETR.